Patents by Inventor Yun-You Lin

Yun-You Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250013595
    Abstract: A device control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: obtaining device status information of the memory storage device, and the device status information includes at least one of temperature information and power consumption information; and adjusting a connection interface standard adopted by a connection interface unit of the memory storage device from a first connection interface standard to a second connection interface standard according to the device status information, and the first connection interface standard is different from the second connection interface standard.
    Type: Application
    Filed: August 16, 2023
    Publication date: January 9, 2025
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Yuwei Kuo, Yun-You Lin, Jhen-Ting Li, Christopher Ramseyer
  • Publication number: 20230021668
    Abstract: A temperature control method, a memory storage apparatus, and a memory control circuit unit are disclosed. The method includes: detecting a system parameter of the memory storage apparatus, and the system parameter reflects wear of a rewritable non-volatile memory module in the memory storage apparatus; determining a temperature control threshold value according to the system parameter; and performing a temperature reducing operation in response to a temperature of the memory storage apparatus reaching the temperature control threshold value to reduce the temperature of the memory storage apparatus.
    Type: Application
    Filed: August 9, 2021
    Publication date: January 26, 2023
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Yu-Hung Yeh, Yun-You Lin
  • Patent number: 10685735
    Abstract: The invention provides a memory management method, a memory storage device, and a memory control circuit unit. The method includes: recording an error bit number of each upper physical programming unit and an error bit number of each lower physical programming unit of each of the physical erasing units; determining whether a first physical erasing unit is a bad physical erasing unit according to distributions of the error bit numbers of the upper physical programming units and the lower physical programming units of the first physical erasing unit of the physical erasing units; and performing a data transfer operation on data in the first physical erasing unit if the first physical erasing unit is determined as the bad physical erasing unit.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: June 16, 2020
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Ping-Chuan Lin, Shii-Yeu Chern, Hsiang-Jui Huang, Ping-Yu Hsieh, Zih-Jia Wang, Yun-You Lin