Patents by Inventor Yun-Yu Hsieh
Yun-Yu Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240021474Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a second ILD layer over the first ILD layer, forming a source/drain contact structure within the first ILD layer and the second ILD layer, and selectively removing a portion of the source/drain contact structure to form a concave top surface of the source/drain contact structure.Type: ApplicationFiled: July 31, 2023Publication date: January 18, 2024Applicant: Taiwan Semiconductor Manufacturing Co., Lid.Inventors: Yun-Yu HSIEH, Ying Ting HSIA, Jeng Chang HER, Cha-Hsin CHAO, Yi-Wei CHIU, Li-Te HSU
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Patent number: 11776847Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a second ILD layer over the first ILD layer, forming a source/drain contact structure within the first ILD layer and the second ILD layer, and selectively removing a portion of the source/drain contact structure to form a concave top surface of the source/drain contact structure.Type: GrantFiled: August 9, 2021Date of Patent: October 3, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yun-Yu Hsieh, Jeng Chang Her, Cha-Hsin Chao, Yi-Wei Chiu, Li-Te Hsu, Ying Ting Hsia
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Publication number: 20210366770Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a second ILD layer over the first ILD layer, forming a source/drain contact structure within the first ILD layer and the second ILD layer, and selectively removing a portion of the source/drain contact structure to form a concave top surface of the source/drain contact structure.Type: ApplicationFiled: August 9, 2021Publication date: November 25, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yun-Yu Hsieh, Jeng Chang Her, Cha-Hsin Chao, Yi-Wei Chiu, Li-Te Hsu, Ying Ting Hsia
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Patent number: 11139174Abstract: A method includes forming a mask layer over a target layer. A first etching process is performed on the mask layer to form a first opening and a second opening in the mask layer. A second etching process is performed on the mask layer to reduce an end-to-end spacing between the first opening and the second opening. The first etching process and the second etching process have different anisotropy properties. A pattern of the mask layer is transferred to the target layer.Type: GrantFiled: December 16, 2019Date of Patent: October 5, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Xi-Zong Chen, Yun-Yu Hsieh, Cha-Hsin Chao, Li-Te Hsu
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Patent number: 11088025Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a second ILD layer over the first ILD layer, forming a source/drain contact structure within the first ILD layer and the second ILD layer, and selectively removing a portion of the source/drain contact structure to form a concave top surface of the source/drain contact structure.Type: GrantFiled: May 26, 2020Date of Patent: August 10, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yun-Yu Hsieh, Jeng Chang Her, Cha-Hsin Chao, Yi-Wei Chiu, Li-Te Hsu, Ying Ting Hsia
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Publication number: 20200286781Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a second ILD layer over the first ILD layer, forming a source/drain contact structure within the first ILD layer and the second ILD layer, and selectively removing a portion of the source/drain contact structure to form a concave top surface of the source/drain contact structure.Type: ApplicationFiled: May 26, 2020Publication date: September 10, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yun-Yu HSIEH, Jeng Chang HER, Cha-Hsin CHAO, Yi-Wei CHIU, Li-Te HSU, Ying Ting HSIA
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Patent number: 10679896Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a first conductive region within the first ILD layer, selectively removing a portion of the first conductive region to form a concave top surface of the first conductive region. The method also includes forming a second ILD layer over the first ILD layer and forming a second conductive region within the second ILD layer and on the concave top surface. The concave top surface provides a large contact area, and hence reduced contact resistance between the first and second conductive regions.Type: GrantFiled: September 24, 2018Date of Patent: June 9, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yun-Yu Hsieh, Jeng Chang Her, Cha-Hsin Chao, Yi-Wei Chiu, Li-Te Hsu, Ying Ting Hsia
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Publication number: 20200118825Abstract: A method includes forming a mask layer over a target layer. A first etching process is performed on the mask layer to form a first opening and a second opening in the mask layer. A second etching process is performed on the mask layer to reduce an end-to-end spacing between the first opening and the second opening. The first etching process and the second etching process have different anisotropy properties. A pattern of the mask layer is transferred to the target layer.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Inventors: Xi-Zong Chen, Yun-Yu Hsieh, Cha-Hsin Chao, Li-Te Hsu
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Patent number: 10515817Abstract: A method includes forming a mask layer over a target layer. A first etching process is performed on the mask layer to form a first opening and a second opening in the mask layer. A second etching process is performed on the mask layer to reduce an end-to-end spacing between the first opening and the second opening. The first etching process and the second etching process have different anisotropy properties. A pattern of the mask layer is transferred to the target layer.Type: GrantFiled: July 6, 2018Date of Patent: December 24, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Xi-Zong Chen, Yun-Yu Hsieh, Cha-Hsin Chao, Li-Te Hsu
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Publication number: 20190103281Abstract: A method includes forming a mask layer over a target layer. A first etching process is performed on the mask layer to form a first opening and a second opening in the mask layer. A second etching process is performed on the mask layer to reduce an end-to-end spacing between the first opening and the second opening. The first etching process and the second etching process have different anisotropy properties. A pattern of the mask layer is transferred to the target layer.Type: ApplicationFiled: July 6, 2018Publication date: April 4, 2019Inventors: Xi-Zong Chen, Yun-Yu Hsieh, Cha-Hsin Chao, Li-Te Hsu
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Publication number: 20190088542Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a first conductive region within the first ILD layer, selectively removing a portion of the first conductive region to form a concave top surface of the first conductive region. The method also includes forming a second ILD layer over the first ILD layer and forming a second conductive region within the second ILD layer and on the concave top surface. The concave top surface provides a large contact area, and hence reduced contact resistance between the first and second conductive regions.Type: ApplicationFiled: September 24, 2018Publication date: March 21, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yun-Yu Hsieh, Jeng Chang Her, Cha-Hsin Chao, Yi-Wei Chiu, Li-Te Hsu, Ying Ting Hsia
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Patent number: 10083863Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a first conductive region within the first ILD layer, selectively removing a portion of the first conductive region to form a concave top surface of the first conductive region. The method also includes forming a second ILD layer over the first ILD layer and forming a second conductive region within the second ILD layer and on the concave top surface. The concave top surface provides a large contact area, and hence reduced contact resistance between the first and second conductive regions.Type: GrantFiled: August 23, 2017Date of Patent: September 25, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yun-Yu Hsieh, Jeng Chang Her, Cha-Hsin Chao, Yi-Wei Chiu, Li-Te Hsu, Ying Ting Hsia