Patents by Inventor Yune-seok CHUNG

Yune-seok CHUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11721640
    Abstract: An integrated circuit chip includes an SOI substrate having a structure in which a bulk substrate, a buried insulating film, and a semiconductor body layer are sequentially stacked, a conductive ion implantation region formed at a position adjacent to the buried insulating film in the bulk substrate, an integrated circuit portion formed on an active surface of the semiconductor body layer, and a penetrating electrode portion arranged at a position spaced apart from the integrated circuit portion in a horizontal direction, the penetrating electrode portion penetrating the semiconductor body layer and the buried insulating layer in a vertical direction, and the penetrating electrode portion connected to the conductive ion implantation region. An integrated circuit package and a display device include the integrated circuit chip.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: August 8, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-gu Kang, Young-mok Kim, Woon-bae Kim, Dae-cheol Seong, Yune-seok Chung
  • Publication number: 20220093527
    Abstract: An integrated circuit chip includes an SOI substrate having a structure in which a bulk substrate, a buried insulating film, and a semiconductor body layer are sequentially stacked, a conductive ion implantation region formed at a position adjacent to the buried insulating film in the bulk substrate, an integrated circuit portion formed on an active surface of the semiconductor body layer, and a penetrating electrode portion arranged at a position spaced apart from the integrated circuit portion in a horizontal direction, the penetrating electrode portion penetrating the semiconductor body layer and the buried insulating layer in a vertical direction, and the penetrating electrode portion connected to the conductive ion implantation region. An integrated circuit package and a display device include the integrated circuit chip.
    Type: Application
    Filed: December 7, 2021
    Publication date: March 24, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-gu KANG, Young-mok KIM, Woon-bae KIM, Dae-cheol SEONG, Yune-seok CHUNG
  • Patent number: 11222853
    Abstract: An integrated circuit chip includes an SOI substrate having a structure in which a bulk substrate, a buried insulating film, and a semiconductor body layer are sequentially stacked, a conductive ion implantation region formed at a position adjacent to the buried insulating film in the bulk substrate, an integrated circuit portion formed on an active surface of the semiconductor body layer, and a penetrating electrode portion arranged at a position spaced apart from the integrated circuit portion in a horizontal direction, the penetrating electrode portion penetrating the semiconductor body layer and the buried insulating layer in a vertical direction, and the penetrating electrode portion connected to the conductive ion implantation region. An integrated circuit package and a display device include the integrated circuit chip.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: January 11, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-gu Kang, Young-mok Kim, Woon-bae Kim, Dae-cheol Seong, Yune-seok Chung
  • Patent number: 11121127
    Abstract: An integrated circuit chip includes a circuit structure, a grounding structure, a bonding layer between the circuit structure and the grounding structure. The circuit structure includes a first substrate, an FEOL structure, and a BEOL structure. The grounding structure includes a second substrate and a grounding conductive layer. The integrated circuit chip includes a first penetrating electrode portion connected to the grounding conductive layer based on extending through the first substrate, the FEOL structure, the BEOL structure, and the bonding layer such that the first penetrating electrode portion is isolated from direct contact with the integrated circuit portion in a horizontal direction extending parallel to an active surface of the first substrate. An integrated circuit package and a display device each include the integrated circuit chip.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: September 14, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-gu Kang, Young-mok Kim, Woon-bae Kim, Dae-cheol Seong, Yune-seok Chung
  • Publication number: 20200235091
    Abstract: An integrated circuit chip includes a circuit structure, a grounding structure, a bonding layer between the circuit structure and the grounding structure. The circuit structure includes a first substrate, an FEOL structure, and a BEOL structure. The grounding structure includes a second substrate and a grounding conductive layer. The integrated circuit chip includes a first penetrating electrode portion connected to the grounding conductive layer based on extending through the first substrate, the FEOL structure, the BEOL structure, and the bonding layer such that the first penetrating electrode portion is isolated from direct contact with the integrated circuit portion in a horizontal direction extending parallel to an active surface of the first substrate. An integrated circuit package and a display device each include the integrated circuit chip.
    Type: Application
    Filed: October 1, 2019
    Publication date: July 23, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: JUNG-GU KANG, Young-mok Kim, Woon-bae Kim, Dae-cheol Seong, Yune-seok Chung
  • Publication number: 20200227359
    Abstract: An integrated circuit chip includes an SOI substrate having a structure in which a bulk substrate, a buried insulating film, and a semiconductor body layer are sequentially stacked, a conductive ion implantation region formed at a position adjacent to the buried insulating film in the bulk substrate, an integrated circuit portion formed on an active surface of the semiconductor body layer, and a penetrating electrode portion arranged at a position spaced apart from the integrated circuit portion in a horizontal direction, the penetrating electrode portion penetrating the semiconductor body layer and the buried insulating layer in a vertical direction, and the penetrating electrode portion connected to the conductive ion implantation region. An integrated circuit package and a display device include the integrated circuit chip.
    Type: Application
    Filed: October 1, 2019
    Publication date: July 16, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-gu KANG, Young-mok KIM, Woon-bae KIM, Dae-cheol SEONG, Yune-seok CHUNG