Abstract: Disclosed are a method, device and system for health monitoring of SoC. The method includes: acquiring in real time sensor data of sensors monitoring SoC performance, the sensor data including reliability degradation sensor data, temperature sensor data, noise sensor data and current sensor data; extracting characteristic data representative of the SoC performance from the sensor data; performing analysis and prediction on the characteristic data in real time by using a prediction algorithm to obtain a performance state and a performance degradation trend of the SoC; outputting performance state information and performance degradation trend information of the SoC. The disclosed method, device and system for health monitoring of SoC can monitor the performance state of the SoC in real time and predict the performance degradation trend of the SoC in real time.

Abstract: A method for predicting remaining life of electromigration failure is disclosed. The methods includes: establishing an electromigration life model of a MOS device; acquiring a normal electromigration failure lifetime ?1, based on a current density and a first environment temperature under a preset normal operating condition and the electromigration life model; acquiring a current density stress, based on a target prognostic point ?2, a second environment temperature and the electromigration life model; inputting the current density stress into a MOS device electromigration failure warning circuit based on a prognostic cell; and if the prognostic circuit of EM failure for a MOS device outputs a high level after a time ?3, acquiring a remaining life of electromigration failure corresponding to ?2? based on ?1, ?2 and ?3. A device for remaining life prediction for electromigration failure is also disclosed.

Abstract: An ESD failure early warning circuit for an integrated circuit is disclosed, including a positive voltage stress generation module, a negative voltage stress generation module, a buck module, a warning output module, capacitors C006, C007, and diodes D001, D002, D003, D004 and D005. The ESD failure early warning circuit can report a warning timely when there is an ESD event in the monitored integrated circuit, to improve the reliability of the device effectively. Moreover, the stress voltage generated by the positive voltage stress generation module and the negative voltage stress generation module is adjustable, so the stress voltage can be set flexibly by a user according to actual condition of the monitored integrated circuit. The present invention has high flexibility and wide application prospect.

Abstract: An on-chip TDDB degradation monitoring and failure early warning circuit for SoC. A control circuit module converts Q1 and Q0 signals into a switch state control signal and outputs the switch state control signal to a digital conversion module for TDDB performance degradation. A MOS transistor of a first MOS transistor circuit within the digital conversion module for TDDB performance degradation is in a stress state of a supply voltage, and a MOS transistor of a second MOS transistor circuit is in a non-stress state. The first and second MOS transistor circuits output a first frequency value and a second frequency value to the output selection module. The output selection module outputs the first frequency value from the digital conversion module to the counter B for recording, or outputs the second frequency value to the counter A for recording. The counter module determines the degradation level of TDDB performance.

Abstract: The present disclosure relates to a system and method for health monitoring and early warning for an electronic device. A sensor is used to monitor a physical parameter of a circuit board of a host electronic system of the electronic device to acquire sensor data, and transmit the acquired sensor data to an embedded control device. The sensor data includes at least one of current data, vibration data, temperature data and voltage data. The embedded control device is used to extract a feature from the sensor data to acquire feature data, and perform real-time analysis and prediction based on the feature data to obtain and display a prediction result. In this way, the user can be provided with real-time health monitoring and real-time prediction information for the host electronic system circuit board.

Abstract: An on-chip TDDB degradation monitoring and failure early warning circuit for SoC. A control circuit module converts Q1 and Q0 signals into a switch state control signal and outputs the switch state control signal to a digital conversion module for TDDB performance degradation. A MOS transistor of a first MOS transistor circuit within the digital conversion module for TDDB performance degradation is in a stress state of a supply voltage, and a MOS transistor of a second MOS transistor circuit is in a non-stress state. The first and second MOS transistor circuits output a first frequency value and a second frequency value to the output selection module. The output selection module outputs the first frequency value from the digital conversion module to the counter B for recording, or outputs the second frequency value to the counter A for recording. The counter module determines the degradation level of TDDB performance.

Abstract: The present disclosure relates to a system and method for health monitoring and early warning for an electronic device. A sensor is used to monitor a physical parameter of a circuit board of a host electronic system of the electronic device to acquire sensor data, and transmit the acquired sensor data to an embedded control device. The sensor data includes at least one of current data, vibration data, temperature data and voltage data. The embedded control device is used to extract a feature from the sensor data to acquire feature data, and perform real-time analysis and prediction based on the feature data to obtain and display a prediction result. In this way, the user can be provided with real-time health monitoring and real-time prediction information for the host electronic system circuit board.

Abstract: An ESD failure early warning circuit for an integrated circuit is disclosed, including a positive voltage stress generation module, a negative voltage stress generation module, a buck module, a warning output module, capacitors C006, C007, and diodes D001, D002, D003, D004 and D005. The ESD failure early warning circuit can report a warning timely when there is an ESD event in the monitored integrated circuit, to improve the reliability of the device effectively. Moreover, the stress voltage generated by the positive voltage stress generation module and the negative voltage stress generation module is adjustable, so the stress voltage can be set flexibly by a user according to actual condition of the monitored integrated circuit. The present invention has high flexibility and wide application prospect.

Abstract: Disclosed are a method, device and system for health monitoring of SoC. The method includes: acquiring in real time sensor data of sensors monitoring SoC performance, the sensor data including reliability degradation sensor data, temperature sensor data, noise sensor data and current sensor data; extracting characteristic data representative of the SoC performance from the sensor data; performing analysis and prediction on the characteristic data in real time by using a prediction algorithm to obtain a performance state and a performance degradation trend of the SoC; outputting performance state information and performance degradation trend information of the SoC. The disclosed method, device and system for health monitoring of SoC can monitor the performance state of the SoC in real time and predict the performance degradation trend of the SoC in real time.

Abstract: Method and system for performing close-loop analysis to electronic component failures are provided. The system establishes an electronic component fault tree of physics of failure (FTPF), converts the FTPF into a failure locating fault tree, establishes an electronic component fault dictionary with the cause of failure mechanism corresponding to failure characteristics, and performs close-loop analysis to the electronic component according to the fault tree and the fault dictionary.

Abstract: A method for predicting remaining life of electromigration failure is disclosed. The methods includes: establishing an electromigration life model of a MOS device; acquiring a normal electromigration failure lifetime ?1, based on a current density and a first environment temperature under a preset normal operating condition and the electromigration life model; acquiring a current density stress, based on a target prognostic point ?2, a second environment temperature and the electromigration life model; inputting the current density stress into a MOS device electromigration failure warning circuit based on a prognostic cell; and if the prognostic circuit of EM failure for a MOS device outputs a high level after a time ?3, acquiring a remaining life of electromigration failure corresponding to ?2? based on ?1, ?2 and ?3. A device for remaining life prediction for electromigration failure is also disclosed.

Abstract: Method and system for performing close-loop analysis to electronic component failures are provided. The system establishes an electronic component fault tree of physics of failure (FTPF), converts the FTPF into a failure locating fault tree, establishes an electronic component fault dictionary with the cause of failure mechanism corresponding to failure characteristics, and performs close-loop analysis to the electronic component according to the fault tree and the fault dictionary.

Abstract: A method for predicting remaining life of electromigration failure is disclosed. The methods includes: establishing an electromigration life model of a MOS device; acquiring a normal electromigration failure lifetime ?1, based on a current density and a first environment temperature under a preset normal operating condition and the electromigration life model; acquiring a current density stress, based on a target prognostic point ?2, a second environment temperature and the electromigration life model; inputting the current density stress into a MOS device electromigration failure warning circuit based on a prognostic cell; and if the prognostic circuit of EM failure for a MOS device outputs a high level after a time ?3, acquiring a remaining life of electromigration failure corresponding to ?2? based on ?1, ?2 and ?3. A device for remaining life prediction for electromigration failure is also disclosed.

Abstract: A method and system for constructing component fault tree based on physics of failure are disclosed. The method includes the steps of: establishing, based on common characteristics of component physics of failure and according to six layers based on physics of failure and category of the component, a fault information database containing information of the six layers based on physics of failure; constructing, based on the fault information database and according to the six layers based on physics of failure and logical relationship of physics of failure, a component fault tree of n levels of events of six layers based on physics of failure; and simplifying the fault tree by means of failure mechanism sub-tree transferring and fault module sub-tree importing. The method and system are applicable to construction of fault tree of various components.

Abstract: A prognostic circuit of EM failure for IC is disclosed, which includes a current monitoring module, the current monitoring module includes a current output module electrically connected with a monitoring metal wire, and one or more conductive metals covered by an oxide layer and electrically insulated with the monitoring metal wire, the current output module includes at least one current source, the conductive metal is electrically connected with the output port of the current monitoring module, and the monitoring metal wire is surrounded by the conductive metal. The above prognostic circuit can give a warning for short-circuit failure caused by a whisker created by EM. Meanwhile, the prognostic circuit of the present disclosure can also be added a resistance warning, and it can indicate the failure of the resistance increased by EM and the short circuit caused by whisker, so as to greatly increase the warning efficiency of the EM.

Abstract: A method and system for constructing component fault tree based on physics of failure are disclosed. The method includes the steps of: establishing, based on common characteristics of component physics of failure and according to six layers based on physics of failure and category of the component, a fault information database containing information of the six layers based on physics of failure; constructing, based on the fault information database and according to the six layers based on physics of failure and logical relationship of physics of failure, a component fault tree of n levels of events of six layers based on physics of failure; and simplifying the fault tree by means of failure mechanism sub-tree transferring and fault module sub-tree importing. The method and system are applicable to construction of fault tree of various components.

Abstract: A method and system for performing component fault problem close loop analysis are provided. The system establishes a component failure physics fault tree, converts the failure physics fault tree into a failure locating fault tree, establishes, a component fault dictionary with failure mechanism cause corresponding to failure characteristics and performs fault problem close loop analysis to the component according to the fault tree and the fault dictionary. By the method and system of the present disclosure, it is possible to locate the component fault in the internal physical structure by the failure locating fault tree, to give a clear failure path, to quickly identify the failure mechanism corresponding to the component failure mode by analysis of failure feature vector of the fault dictionary, and to determine the mechanism factors and influencing factors of relevant failure mechanism by the failure physics fault tree.

Abstract: A method for predicting remaining life of electromigration failure is disclosed. The methods includes: establishing an electromigration life model of a MOS device; acquiring a normal electromigration failure lifetime ?1, based on a current density and a first environment temperature under a preset normal operating condition and the electromigration life model; acquiring a current density stress, based on a target prognostic point ?2, a second environment temperature and the electromigration life model; inputting the current density stress into a MOS device electromigration failure warning circuit based on a prognostic cell; and if the prognostic circuit of EM failure for a MOS device outputs a high level after a time ?3, acquiring a remaining life of electromigration failure corresponding to ?2? based on ?1, ?2 and ?3. A device for remaining life prediction for electromigration failure is also disclosed.

Abstract: A prognostic circuit of EM failure for IC is disclosed, which includes a current monitoring module, the current monitoring module includes a current output module electrically connected with a monitoring metal wire, and one or more conductive metals covered by an oxide layer and electrically insulated with the monitoring metal wire, the current output module includes at least one current source, the conductive metal is electrically connected with the output port of the current monitoring module, and the monitoring metal wire is surrounded by the conductive metal. The above prognostic circuit can give a warning for short-circuit failure caused by a whisker created by EM. Meanwhile, the prognostic circuit of the present disclosure can also be added a resistance warning, and it can indicate the failure of the resistance increased by EM and the short circuit caused by whisker, so as to greatly increase the warning efficiency of the EM.