Abstract: A semiconductor device includes a substrate. A gate structure is over the substrate. Source/drain epitaxial structures are on opposite sides of the gate structure. An interlayer dielectric (ILD) structure surrounds and covers the gate structure. A dielectric liner lines a sidewall of the ILD structure and wraps a top corner of the gate structure. The dielectric liner comprises a bottom portion, a top portion above the bottom portion, and a middle portion connecting the bottom portion and the top portion, wherein the middle portion has a different composition than the bottom portion and the top portion.

Abstract: Methods for removing haze defects from a photomask or reticle are disclosed. The photomask is placed into a chamber which includes a hydrogen atmosphere. The photomask is then exposed to radiation. The energy from the radiation, together with the hydrogen, causes decomposition of the haze defects. The methods can be practiced on-site and quickly, without the need for wet chemicals or the need to remove the pellicle before cleaning of the photomask. A device for conducting the methods is also disclosed herein.

Abstract: A method of burn-in compensation for a display panel, a display control circuit, and a display device are provided. The method includes: performing a compensation calculation on input pixel data based on a first compensation value for the first display region, to generate output pixel data of the first display region, the first compensation value being determined based on a first accumulated burn-in stress of the first display region; sampling, based on a first sampling period, to obtain sampled pixel data of the first display region in a first sampled output frame; determining a first burn-in stress increment based on the sampled pixel data of the first display region; and generating a first updated accumulated burn-in stress based on the first accumulated burn-in stress and the first burn-in stress increment, or based on the first compensation value and the first burn-in stress increment, for updating the first sampling period.

Abstract: A method of forming a semiconductor device includes: forming a dummy gate structure over a nanostructure, where the nanostructure overlies a fin that protrudes above a substrate, where the nanostructure comprises alternating layers of a first semiconductor material and a second semiconductor material; forming openings in the nanostructure on opposing sides of the dummy gate structure, the openings exposing end portions of the first semiconductor material and end portions of the second semiconductor material; recessing the exposed end portions of the first semiconductor material to form first sidewall recesses; filling the first sidewall recesses with a multi-layer spacer film; removing at least one sublayer of the multi-layer spacer film to form second sidewall recesses; and forming source/drain regions in the openings after removing at least one sublayer, where the source/drain regions seal the second sidewall recesses to form sealed air gaps.

Abstract: The present invention relates to the technical field of magnetic attraction lines, and in particular, to a magnetic attraction line convenient to store, including a line body and a connector, where line cores are connected into the line body, outer surfaces of the line cores are covered with an injection molding layer, an outer surface of the injection molding layer is coated with a magnetic attraction layer, an outer surface of the magnetic attraction layer is coated with a protection layer, and an isolation and protection layer is disposed between the magnetic attraction layer and the injection molding layer. Through a coating connection between the magnetic attraction layer and the injection molding layer, and under the action of the magnetic attraction layer, a magnetic attraction connection effect of the line bodies is achieved, and then a magnetic storage effect of the line bodies is achieved.

Abstract: A system with integration of a flat display and a floating-image display and an operating method are provided. The system includes a flat display module and a floating-image display module. In an initialization procedure, a signal channel is established between the flat display module and the floating-image module. The flat display module displays a 2D image according to a flat display signal. A floating-image display signal is generated according to a control instruction, and accordingly a floating-image display is used to display a floating image. After that, the floating-image display module receives an interaction instruction that is calculated when the floating-image display module receives a signal generated by manipulating the floating image. The floating-image display module updates the floating image according to the interaction instruction, and the flat display module correspondingly displays another 2D image.

Abstract: A method of forming a semiconductor device includes forming a first layer on a semiconductor fin; forming a mask on the first layer, the mask being thicker on a top of the semiconductor fin than along a sidewall of the semiconductor fin. The first layer is thinned along the sidewall of the semiconductor fin using the mask. A second layer is formed on the semiconductor fin, the second layer covering the mask and the first layer. A dummy gate layer is formed on the semiconductor fin and patterned to expose a top surface of the semiconductor fin.

Abstract: Improved inner spacers for semiconductor devices and methods of forming the same are disclosed.

Abstract: A method comprises forming a gate stack over a semiconductor region, performing an epitaxy process to form a source/drain region aside of the gate stack, forming a source/drain contact plug over and electrically coupling to the source/drain region, forming a gate contact plug over and electrically coupling to the gate stack, and selectively forming an inhibitor film on a dielectric layer nearby a conductive feature. The conductive feature is selected from the group consisting of the source/drain region, the source/drain contact plug, and the gate contact plug. An etch stop layer is selectively deposited on the conductive feature, wherein the first inhibitor film prevents the first etch stop layer from being deposited thereon. The inhibitor film is then removed.

Abstract: A method of manufacturing a semiconductor device includes forming a multi-layer stack of alternating first layers of a first semiconductor material and second layers of a second semiconductor material on a semiconductor substrate, forming a first recess through the multi-layer stack, and laterally recessing sidewalls of the second layers of the multi-layer stack. The sidewalls are adjacent to the first recess. The method further includes forming inner spacers with respective seams adjacent to the recessed second layers of the multi-layer stack and performing an anneal treatment on the inner spacers to close the respective seams.

Abstract: A method of forming a semiconductor device includes forming a sacrificial layer over a first stack of nanostructures and an isolation region. A dummy gate structure is formed over the first stack of nanostructures, and a first portion of the sacrificial layer. A second portion of the sacrificial layer is removed to expose a sidewall of the first stack of nanostructures adjacent the dummy gate structure. A spacer layer is formed over the dummy gate structure. A first portion of the spacer layer physically contacts the first stack of nanostructures.

Abstract: An integrated air valve structure includes a main body and two air valves. The main body is formed with two air passages not communicated with each other, a plurality of through holes disposed corresponding to the two air passages, and two valve mounting seats. One valve mounting seat is disposed corresponding to one of the through holes, the other valve mounting seat is disposed corresponding to two of the through holes belonging to the two air passages. The two air valves are disposed on the two valve mounting seats, each air valves includes an air plug facing at least one of the through holes, a valve body assembled with one of the two valve mounting seats for the air plug to move therein, and a coil disposed on the valve body for generating magnetic force to change a position of the air plug.

Abstract: Semiconductor devices and methods of manufacturing are presented in which inner spacers for nanostructures are manufactured. In embodiments a dielectric material is deposited for the inner spacer and then treated. The treatment may add material and cause an expansion in volume in order to close any seams that can interfere with subsequent processes.

Abstract: A tube-in-tube heat pipe is disclosed. A tube-in-tube heat pipe can include an outer tube having a cylindrical shape that extends from a first end to a second end and having an outer tube chamber. The outer tube can be sealed at the first and the second end. The tube-in-tube heat pipe can also include an inner tube having a cylindrical shape and disposed within the outer tube. The inner tube comprising a porous material surrounding an inner volume. The inner tube is disposed within the outer tube chamber.

Abstract: Semiconductor devices including fin-shaped isolation structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a fin extending from a semiconductor substrate; a shallow trench isolation (STI) region over the semiconductor substrate adjacent the fin; and a dielectric fin structure over the STI region, the dielectric fin structure extending in a direction parallel to the fin, the dielectric fin structure including a first liner layer in contact with the STI region; and a first fill material over the first liner layer, the first fill material including a seam disposed in a lower portion of the first fill material and separated from a top surface of the first fill material, a first carbon concentration in the lower portion of the first fill material being greater than a second carbon concentration in an upper portion of the first fill material.

Abstract: Methods for removing haze defects from a photomask or reticle are disclosed. The photomask is placed into a chamber which includes a hydrogen atmosphere. The photomask is then exposed to radiation. The energy from the radiation, together with the hydrogen, causes decomposition of the haze defects. The methods can be practiced on-site and quickly, without the need for wet chemicals or the need to remove the pellicle before cleaning of the photomask. A device for conducting the methods is also disclosed herein.

Abstract: A method includes following steps. A target layer is formed over a substrate. A first hard mask layer is formed over the target layer by a plasma generated using a first radio frequency generator and a second radio frequency generator. The first radio frequency generator and the second radio frequency generator have different powers. A second hard mask layer is formed over the first hard mask layer by a plasma generated using the first radio frequency generator without using the second radio frequency generator. A photoresist layer is formed over the second hard mask layer. The photoresist layer is exposed. The photoresist layer is developed. The first hard mask layer and the second hard mask layer are patterned using the photoresist layer as an etch mask. The target layer is patterned using the first hard mask layer and the second hard mask layer as an etch mask.

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.

Abstract: A method includes providing a workpiece to a semiconductor apparatus, the workpiece including a material layer, wherein the material layer includes a plurality of first strips. Each of the first strips includes a first plurality and a second plurality of exposure fields, wherein the first plurality of exposure fields and the second plurality of exposure fields are configured with different exposure parameters. The method further includes scanning each of the first strips along a first scan direction from a first side of the workpiece to a second side of the workpiece to generate first topography measurement data, scanning each of the first strips along a second scan direction from the second side to the first side to generate second topography measurement data, and generating data of depth of focus (DOF) for each of the first plurality of exposure fields and each of the second plurality of exposure fields.

Abstract: A semiconductor device with isolation structures of different dielectric constants and a method of fabricating the same are disclosed. The semiconductor device includes fin structures with first and second fin portions disposed on first and second device areas on a substrate and first and second pair of gate structures disposed on the first and second fin portions. The second pair of gate structures is electrically isolated from the first pair of gate structures. The semiconductor device further includes a first isolation structure interposed between the first pair of gate structures and a second isolation structure interposed between the second pair of gate structures. The first isolation structure includes a first nitride liner and a first oxide fill layer. The second isolation structure includes a second nitride liner and a second oxide fill layer. The second nitride layer is thicker than the first nitride layer.