Patents by Inventor Yung Cheng Tsai

Yung Cheng Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210366443
    Abstract: A displaying method applicable for a displaying panel including a plurality of pixel circuits is disclosed. The displaying method includes: receiving a plurality of input data, wherein the plurality of input data comprise a curve; converting a plurality of coordinates of the plurality of input data into a plurality of real coordinates according to the plurality of pixel circuits; applying anti-aliasing processing to the plurality of input data; and displaying the plurality of input data by the plurality of pixel circuits.
    Type: Application
    Filed: May 24, 2020
    Publication date: November 25, 2021
    Inventors: Yung-Cheng TSAI, Feng-Ting PAI
  • Publication number: 20210343212
    Abstract: A displaying method for displaying an image on a displaying panel including a first area having a first resolution and a second area having a second resolution lower than the first resolution is disclosed. The displaying method includes the following operations: determining a part of the first area as a third area, wherein the third area is adjacent to the second area; applying a mask to the third area, so that a third resolution applicable in the third area is between the first resolution and the second resolution; and displaying the image according to corresponding resolutions in the first, the second and the third areas of the displaying panel, respectively.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 4, 2021
    Inventors: Yung-Cheng TSAI, Feng-Ting PAI
  • Publication number: 20210304677
    Abstract: The present invention provides an image compensation circuit generating output image data to drive a display panel having pixels. The image compensation circuit includes first/second control circuits and first/second compensation circuits. The first control circuit may receive input image data for the pixels and generate a plurality of first compensation values corresponding to compensation for voltage drop on the display panel according to the input image data. The first compensation circuit may compensate the input image data for the pixels with the first compensation values. The second control circuit may receive the first compensation values from the first control circuit and generate a plurality of second compensation values corresponding to compensation for channel length modulation (CLM) effect of the pixels according to the first compensation values.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 30, 2021
    Inventors: Jun-Yu Yang, Wei-Jhe Ma, Yung-Cheng Tsai, Feng-Ting Pai
  • Patent number: 10838540
    Abstract: A touch control device with ESD protection includes a touch display panel, a switching unit, a touch electrode and a ground electrode. An ESD protection electrode is provided around at least one periphery of the touch display panel. A scanning period of the ESD protection electrode is divided into touch periods and ESD periods. When the scanning period of the ESD protection electrode is during the touch periods, the ESD protection electrode is used as touch electrodes for sensing touch events made by a user on the touch display panel. When the scanning period of the ESD protection electrode is during the ESD periods, the ESD protection electrode is used as ESD protection electrodes for dissipating ESD on the touch display panel in order to protect signal elements inside the touch display panel. The ESD protection electrode is therefore used for not only ESD protection, but also touch sensing.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: November 17, 2020
    Assignee: WISECHIP SEMICONDUCTOR INC.
    Inventors: Chien-Hsun Chen, Yung-Cheng Tsai, Chien-Le Li, Shih-Hong Jhang, You-Hong Jhang
  • Patent number: 10818210
    Abstract: A display apparatus and a brightness uniformity compensation method are introduced. The display apparatus includes a display panel, a content analysis circuit, a compensation table generator and a pixel compensation circuit. The content analysis circuit receives display data for a pixel of the display panel and analyzes a display load of the display data to generate a data compensation value. The compensation table generator generates a compensation table that includes the data compensation value corresponding to the display data of each pixel of the display panel. The pixel compensation circuit compensates the display data with the corresponding data compensation value included in the compensation table to generate compensated display data, wherein the compensated display data are displayed on the display panel of the display apparatus.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: October 27, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventors: Wei-Jhe Ma, Yung-Cheng Tsai, Feng-Ting Pai
  • Publication number: 20200251033
    Abstract: A display apparatus and a brightness uniformity compensation method are introduced. The display apparatus includes a display panel, a content analysis circuit, a compensation table generator and a pixel compensation circuit. The content analysis circuit receives display data for a pixel of the display panel and analyzes a display load of the display data to generate a data compensation value. The compensation table generator generates a compensation table that includes the data compensation value corresponding to the display data of each pixel of the display panel. The pixel compensation circuit compensates the display data with the corresponding data compensation value included in the compensation table to generate compensated display data, wherein the compensated display data are displayed on the display panel of the display apparatus.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventors: Wei-Jhe Ma, Yung-Cheng Tsai, Feng-Ting Pai
  • Publication number: 20190265830
    Abstract: A touch control device with ESD protection includes a touch display panel, a switching unit, a touch electrode and a ground electrode. An ESD protection electrode is provided around at least one periphery of the touch display panel. A scanning period of the ESD protection electrode is divided into touch periods and ESD periods. When the scanning period of the ESD protection electrode is during the touch periods, the ESD protection electrode is used as touch electrodes for sensing touch events made by a user on the touch display panel. When the scanning period of the ESD protection electrode is during the ESD periods, the ESD protection electrode is used as ESD protection electrodes for dissipating ESD on the touch display panel in order to protect signal elements inside the touch display panel. The ESD protection electrode is therefore used for not only ESD protection, but also touch sensing.
    Type: Application
    Filed: February 27, 2018
    Publication date: August 29, 2019
    Inventors: Chien-Hsun Chen, Yung-Cheng Tsai, Chien-Le Li, Shih-Hong Jhang, You-Hong Jhang
  • Publication number: 20180175321
    Abstract: A transparent organic light emitting diode (OLED) includes a transparent substrate; transparent anodes on the transparent substrate and bridged by an insulating layer; at least an isolation pillar provided above the insulating layer; an organic light emitting layer coated on the surfaces of the transparent anodes and the isolation pillars; and a metal cathode coated on the surfaces of the organic light emitting layer on the transparent anodes. When light passes through the transparent OLED, only the areas where the metal cathode is coated will affect the light transmittance, and the rest of the areas not coated with the metal cathode may maintain a better transmittance. By reducing the coating area of the metal cathode, the transparent OLED is able to increase its transmittance accordingly.
    Type: Application
    Filed: December 14, 2017
    Publication date: June 21, 2018
    Inventors: Chih-Hsien Yuan, I-Hsuan Lin, Chien-Le Li, Yung-Cheng Tsai, Chien-Hsun Chen
  • Patent number: 9653530
    Abstract: An OLED module equipped with vertical electric connection structure includes a substrate, a plurality of OLED clusters, an anode wire structure and a cathode wire structure. The substrate is extended toward a first direction. The OLED clusters are located on the substrate in the first direction. The anode wire structure includes a bottom layer wire set, an insulation layer, a middle wire layer set and a top layer wire set. The bottom layer wire set is located on the substrate. The insulation layer is located on the bottom layer wire set. The top layer wire set is located on the insulation layer. The cathode wire structure is located on the substrate and extended axially thereof. The middle layer wire set runs through the insulation layer and forms vertical connection between the bottom layer wire set and the top layer wire set.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: May 16, 2017
    Assignee: WiseChip Semiconductor Inc.
    Inventors: Po-Hsin Lin, Shih-Hung Chang, Shang-Chih Lin, Chia-Chi Huang, I-Hsuan Lin, Sheng-Hsu Shih, Chien-Hsun Chen, Yung-Cheng Tsai, Chien-Le Li
  • Publication number: 20170040391
    Abstract: An organic light emitting diode (OLED) module with optical signal transmission includes a substrate, an OLED element, an optical signal transmission element and a spacing member. The substrate includes a light emitting region, an optical transmission region, and a spacing region spaced between the light emitting region and an optical transmission region. The OLED element is disposed in the light emitting region, and includes a first electrode layer, a second electrode layer and an organic light emitting layer. The optical signal transmission element is disposed in the optical transmission region and transmits an optical signal to the exterior. The spacing member is disposed in the spacing region, and includes a lower portion and an upper portion having a width greater than that of the lower portion. Thus, the present invention provides a simplified manufacturing process, a reduced overall volume and lowered production costs.
    Type: Application
    Filed: August 5, 2015
    Publication date: February 9, 2017
    Inventors: CHIEN-LE LI, YUNG-CHENG TSAI, CHIEN-HSUN CHEN
  • Publication number: 20160343778
    Abstract: A severable organic light-emitting diode module includes a substrate, a first electrode located on the substrate, an organic light-emitting element layer, an electric connection element, an insulation wall and a second electrode. The organic light-emitting element layer is located on the first electrode and includes a bottom surface, a top surface and a through hole run through the bottom surface and the top surface. The electric connection element is located in the through hole and has a bottom portion in contact with the first electrode and a top portion extended over the top surface. The insulation wall is located between the electric connection element and the organic light-emitting element layer. The second electrode is located on the top surface. The second electrode and the top portion of the electric connection element are located at an electric connection side higher than the top surface of the organic light-emitting element layer.
    Type: Application
    Filed: May 19, 2015
    Publication date: November 24, 2016
    Inventors: Chien-Le LI, Yung-Cheng TSAI, Chien-Hsun CHEN
  • Publication number: 20160260793
    Abstract: An OLED module equipped with vertical electric connection structure includes a substrate, a plurality of OLED clusters, an anode wire structure and a cathode wire structure. The substrate is extended toward a first direction. The OLED clusters are located on the substrate in the first direction. The anode wire structure includes a bottom layer wire set, an insulation layer, a middle wire layer set and a top layer wire set. The bottom layer wire set is located on the substrate. The insulation layer is located on the bottom layer wire set. The top layer wire set is located on the insulation layer. The cathode wire structure is located on the substrate and extended axially thereof The middle layer wire set runs through the insulation layer and forms vertical connection between the bottom layer wire set and the top layer wire set.
    Type: Application
    Filed: February 3, 2016
    Publication date: September 8, 2016
    Inventors: Po-Hsin LIN, Shih-Hung CHANG, Shang-Chih LIN, Chia-Chi HUANG, I-Hsuan LIN, Sheng-Hsu SHIH, Chien-Hsun CHEN, Yung-Cheng TSAI, Chien-Le LI
  • Patent number: 8451085
    Abstract: A co-fired multi-layer stack chip resistor is provided. The co-fired multi-layer stack chip resistor includes a ceramic substrate and a multi-layer stack resistance structure monomer. The ceramic substrate is formed by stacking multiple layers of the ceramic membranes, wherein the ceramic membranes is formed of a bearing membrane and a porcelain slurry with the solvent, the binder and the dispersant. The multi-layer stack resistance structure monomer is stacked on the ceramic substrate, and includes multiple bearing membranes and multiple resistive layers, wherein each resistive layer is formed on the surface of the corresponding bearing membrane, the resistive layers are parallel to each other, and the contiguous resistive layers are stacked with the interval of the predetermined distance along the vertical direction.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: May 28, 2013
    Assignee: Prosperity Dielectrics Co., Ltd.
    Inventors: Yung Cheng Tsai, Ching Jen Tsai, Tung Yi Chou, Hung Chun Wu
  • Publication number: 20130127587
    Abstract: A co-fired multi-layer stack chip resistor is provided. The co-fired multi-layer stack chip resistor includes a ceramic substrate and a multi-layer stack resistance structure monomer. The ceramic substrate is formed by stacking multiple layers of the ceramic membranes, wherein the ceramic membranes is formed of a bearing membrane and a porcelain slurry with the solvent, the binder and the dispersant. The multi-layer stack resistance structure monomer is stacked on the ceramic substrate, and includes multiple bearing membranes and multiple resistive layers, wherein each resistive layer is formed on the surface of the corresponding bearing membrane, the resistive layers are parallel to each other, and the contiguous resistive layers are stacked with the interval of the predetermined distance along the vertical direction.
    Type: Application
    Filed: June 21, 2012
    Publication date: May 23, 2013
    Applicant: PROSPERITY DIELECTRICS CO., LTD.
    Inventors: YUNG CHENG TSAI, CHING JEN TSAI, TUNG YI CHOU, HUNG CHUN WU