Abstract: A disk array system and a data processing method are provided. The data processing method is applied to the disk array system. The disk array system is a redundancy array of independent disk 0 (RAID 0) system. The disk array system includes a plurality of disks. The data processing method includes: receiving a reading command; determining whether to divide the reading command to a plurality of reading command segments according to the reading command; and assigning the reading command to a corresponding disk of the disks to read data stored in the corresponding disk accordingly when it is determined that the reading command is not divided.

Abstract: A disk array system and a data processing method are provided. The data processing method is applied to the disk array system. The disk array system includes a first disk and a second disk. The data processing method includes: receiving a reading command, wherein the reading, command includes a data starting address; determining to assign the reading command to the first disk or the second disk according to the data starting address of the reading command and a stripe size; and reading corresponding data according to the reading command from the first disk or the second disk which receives the reading command.

Abstract: A disk array system and a data processing method are provided. The data processing method is applied to the disk array system. The disk array system is a redundancy array of independent disk 0 (RAID 0) system The disk array system includes a plurality of disks. The data processing method includes: receiving a reading command; determining whether to divide the reading command to a plurality of reading command segments according to the reading command; and assigning the reading command to a corresponding disk of the disks to read data stored in the corresponding disk accordingly when it is determined that the reading command is not divided.

Abstract: A disk array system and a data processing method are provided. The data processing method is applied to the disk array system. The disk array system includes a first disk and a second disk The data processing method includes: receiving a reading command, wherein the reading, command includes a data starting address; determining to assign the reading command to the first disk or the second disk according to the data starting address of the reading command. and a stripe size; and reading corresponding data according to the reading command from the first disk or the second disk which receives the reading command.

Abstract: A data processing system and a method for accessing data therein. The data processing system includes a microprocessor, an application specific integrated circuit (ASIC), and a memory. The ASIC is coupled between the microprocessor and the memory and is utilized to communicate with an external computer system for downloading a program code from the external computer system to the memory in which the program code is stored in a memory region of the memory through the ASIC. In addition, the ASIC is for mapping the memory region onto an external memory address space of the microprocessor. The microprocessor generates an address latch enable (ALEN) signal, program memory enable (PMEN) signal, read enable (RDEN) signal, write enable (WREN) signal, and a first address signal.

Abstract: A data processing system and a method for accessing data therein. The data processing system includes a microprocessor, an application specific integrated circuit (ASIC), and a memory. The ASIC is coupled between the microprocessor and the memory and is utilized to communicate with an external computer system for downloading a program code from the external computer system to the memory in which the program code is stored in a memory region of the memory through the ASIC. In addition, the ASIC is for mapping the memory region onto an external memory address space of the microprocessor. The microprocessor generates an address latch enable (ALEN) signal, program memory enable (PMEN) signal, read enable (RDEN) signal, write enable (WREN) signal, and a first address signal.