Patents by Inventor Yung-Chi Wang

Yung-Chi Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250047948
    Abstract: Interaction is created between users and streamers even when the users give gifts to the streamers outside live-streams. Provided is a terminal of a user, which includes: one or more processors; and memory storing one or more computer programs configured to be executed by the one or more processors. The one or more computer programs include instructions for: receiving, from the user, an instruction to use a gift for a streamer while the user is not participating in a live-stream of the streamer; and causing an output unit to output an effect corresponding to the use of the gift by the user while the streamer is live-streaming.
    Type: Application
    Filed: October 21, 2024
    Publication date: February 6, 2025
    Inventors: Yu-Shan YANG, Yung-Chi HSU, Sheng-Kai HSU, Ching-Jan WANG, Yun-An LIN
  • Patent number: 12211802
    Abstract: A package structure includes a plurality of semiconductor die, an insulating encapsulant and a redistribution layer. Each of the plurality of semiconductor dies includes a semiconductor substrate, conductive pads disposed on the semiconductor substrate, conductive posts disposed on the conductive pads, and at least one alignment mark located on the semiconductor substrate. The insulating encapsulant is encapsulating the plurality of semiconductor dies. The redistribution layer is disposed on the insulating encapsulant and electrically connected to the plurality of semiconductor dies.
    Type: Grant
    Filed: May 17, 2023
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jhih-Yu Wang, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao, Yung-Chi Chu
  • Patent number: 12205903
    Abstract: A package includes a die and a redistribution structure. The die has an active surface and is wrapped around by an encapsulant. The redistribution structure disposed on the active surface of the die and located above the encapsulant, wherein the redistribution structure comprises a conductive via connected with the die, a routing pattern located above and connected with the conductive via, and a seal ring structure, the seal ring structure includes a first seal ring element and a second seal ring element located above and connected with the first seal ring element, wherein the second seal ring element includes a seed layer sandwiched between the first seal ring element and the second seal ring element, and a top surface of the first seal ring element is substantially coplanar with a top surface of the conductive via.
    Type: Grant
    Filed: October 5, 2023
    Date of Patent: January 21, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Chi Chu, Hung-Jui Kuo, Jhih-Yu Wang, Yu-Hsiang Hu
  • Publication number: 20250020852
    Abstract: A light guide plate includes a light incident surface, a first surface connected to the light incident surface, and a plurality of optical microstructures disposed on the first surface. Each optical microstructure has a first cross-sectional profile along a first direction and a second cross-sectional profile along a second direction perpendicular to the first direction. The first cross-sectional profile is different from the second cross-sectional profile. The optical microstructures include a plurality of first optical microstructures and a plurality of second optical microstructures. The second cross-sectional profile of each first optical microstructure is different from the second cross-sectional profile of each second optical microstructure. A light source module including the light guide plate projects light into the light incident surface.
    Type: Application
    Filed: March 8, 2024
    Publication date: January 16, 2025
    Applicant: CM Visual Technology Corporation
    Inventors: Tsang-Chi Wang, Hsin Wen Chang, Hung Yu Lin, Yung Pin Chen
  • Publication number: 20240074037
    Abstract: A method of manufacturing an electronic device, including the following steps, is provided. A first dielectric layer and a second dielectric layer are provided. The first dielectric layer has a first surface and a second surface opposite to each other, and the second dielectric layer has a third surface and a fourth surface opposite to each other. A first unit is formed on the first surface or the second surface of the first dielectric layer. The first dielectric layer and the second dielectric layer are combined to form a substrate structure. The second surface of the first dielectric layer faces the third surface of the second dielectric layer. A dielectric loss of the first unit is less than a dielectric loss of the first dielectric layer. The method of manufacturing the electronic device of the embodiment of the disclosure can reduce the dielectric loss by using the unit.
    Type: Application
    Filed: July 20, 2023
    Publication date: February 29, 2024
    Applicant: Innolux Corporation
    Inventors: Yung-Chi Wang, Ying-Jen Chen, Chih-Yung Hsieh
  • Patent number: 6274413
    Abstract: A method for fabricating a polysilicon thin film transistor combining the channel oxidation process and the plasma hydrogenation process is disclosed. The fabrication process includes the following steps: (a) forming a field oxide layer on a silicon substrate, (b) forming a polysilicon layer on a portion of the field oxide layer to serve as a gate, (c) forming a gate oxide on the polysilicon layer and another portion of the field oxide layer, (d) forming a polysilicon channel on the gate oxide layer, (e) defining a source region and a drain region in a portion of the polysilicon channel, (f) oxidizing another portion of the polysilicon channel, (g) forming a dielectric layer on said polysilicon channel, and (h) hydrogenating said polysilicon thin film transistor by plasma. Such a combination results in an better efficiency for passivating the tail state traps, and can prevent the polysilicon thin film from being damaged caused by the plasma glow during the plasma hydrogenation process.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: August 14, 2001
    Assignee: National Science Council
    Inventors: Yean-Kuen Fang, Dun-Nien Yang, Yung-Chi Wang