Patents by Inventor Yung Ching Lin

Yung Ching Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240371915
    Abstract: A method of forming an integrated circuit structure includes forming a first magnetic layer, forming a first conductive line over the first magnetic layer, and coating a photo-sensitive coating on the first magnetic layer. The photo-sensitive coating includes a first portion directly over the first conductive line, and a second portion offset from the first conductive line. The first portion is joined to the second portion. The method further includes performing a first light-exposure on the first portion of the photo-sensitive coating, performing a second light-exposure on both the first portion and the second portion of the photo-sensitive coating, developing the photo-sensitive coating, and forming a second magnetic layer over the photo-sensitive coating.
    Type: Application
    Filed: July 19, 2024
    Publication date: November 7, 2024
    Inventors: Chun Kai Tzeng, Cheng Jen Lin, Yung-Ching Chao, Ming-Da Cheng, Mirng-Ji Lii
  • Publication number: 20240371959
    Abstract: A method includes forming a first fin structure and a second fin structure protruding from a substrate, forming a dielectric fin between the first fin structure and the second fin structure, recessing the dielectric fin to form a trench between the first fin structure and the second fin structure, and depositing a first dielectric layer on sidewall surfaces of the trench and on a top surface of the recessed dielectric fin. After the depositing the first dielectric layer, a second dielectric layer is deposited in the trench. The method further includes depositing a third dielectric layer to cap the second dielectric layer in the trench, and forming a gate structure on the first fin structure, the second fin structure, and the third dielectric layer.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Chih-Chung Chang, Sung-En Lin, Chung-Ting Ko, You-Ting Lin, Yi-Hsiu Liu, Po-Wei Liang, Jiun-Ming Kuo, Yung-Cheng Lu, Chi On Chui, Yuan-Ching Peng, Jen-Hong Chang
  • Patent number: 12136644
    Abstract: A method of forming an integrated circuit structure includes forming a first magnetic layer, forming a first conductive line over the first magnetic layer, and coating a photo-sensitive coating on the first magnetic layer. The photo-sensitive coating includes a first portion directly over the first conductive line, and a second portion offset from the first conductive line. The first portion is joined to the second portion. The method further includes performing a first light-exposure on the first portion of the photo-sensitive coating, performing a second light-exposure on both the first portion and the second portion of the photo-sensitive coating, developing the photo-sensitive coating, and forming a second magnetic layer over the photo-sensitive coating.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: November 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun Kai Tzeng, Cheng Jen Lin, Yung-Ching Chao, Ming-Da Cheng, Mirng-Ji Lii
  • Publication number: 20240337920
    Abstract: A design method of a photomask structure including the following steps is provided. A first layout pattern is provided. An assist pattern is added aside the first layout pattern. An optical proximity correction (OPC) is performed to convert the first layout pattern into a second layout pattern, wherein the assist pattern has an adjacent portion adjacent to the second layout pattern, a first distance between the adjacent portion and the second layout pattern is less than a safety distance, and the safety distance is a distance to prevent the assist pattern from being transferred to a photoresist layer during a lithography process. After the OPC is performed, the adjacent portion is shifted to increase the first distance to a second distance, wherein the second distance is greater than or equal to the safety distance.
    Type: Application
    Filed: June 12, 2023
    Publication date: October 10, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Kuei Yu Chien, Yung Ching Mai, Shin-Shing Yeh, Chia-Chi Lin, Jun-Cheng Lai
  • Patent number: 12113113
    Abstract: A semiconductor device includes a pair of fin structures on a semiconductor substrate, each including a vertically stacked plurality of channel layers, a dielectric fin extending in parallel to and between the fin structures, and a gate structure on and extending perpendicularly to the fin structures, the gate structure engaging with the plurality of channel layers. The dielectric fin includes a fin bottom and a fin top over the fin bottom. The fin bottom has a top surface extending above a bottom surface of a topmost channel layer. The fin top includes a core and a shell, the core having a first dielectric material, the shell surrounding the core and having a second dielectric material different from the first dielectric material.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: October 8, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chung Chang, Sung-En Lin, Chung-Ting Ko, You-Ting Lin, Yi-Hsiu Liu, Po-Wei Liang, Jiun-Ming Kuo, Yung-Cheng Lu, Chi On Chui, Yuan-Ching Peng, Jen-Hong Chang
  • Publication number: 20240297086
    Abstract: An interconnection structure and a package structure are provided. The interconnection structure includes a substrate, a conductive layer, a bonding layer, and a moderating layer. The conductive layer is over the substrate and has a top surface. The bonding layer is over the top surface of the conductive layer. The moderating layer is between the conductive layer and the bonding layer and configured to mitigate an increase in a surface roughness of the top surface of the conductive layer during an electroless plating process for forming the bonding layer.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 5, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Wei CHIANG, Yun-Ching HUNG, Yung-Sheng LIN
  • Patent number: 10103104
    Abstract: A package carrier including a flexible substrate, a first build-up structure and a second build-up structure is provided. The flexible substrate has a first surface and a second surface opposite to each other, and has a first opening connected between the first surface and the second surface. The first build-up structure is disposed on the first surface and covers the first opening. The second build-up structure is disposed on the second surface and has a second opening, and the first opening and the second opening are connected to each other to form a chip accommodating cavity together. In addition, a manufacturing method of the package carrier and a chip package structure having the package carrier are also provided.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: October 16, 2018
    Assignee: Unimicron Technology Corp.
    Inventors: Yung-Ching Lin, Chen-Chun Liu
  • Publication number: 20180005949
    Abstract: A package carrier including a flexible substrate, a first build-up structure and a second build-up structure is provided. The flexible substrate has a first surface and a second surface opposite to each other, and has a first opening connected between the first surface and the second surface. The first build-up structure is disposed on the first surface and covers the first opening. The second build-up structure is disposed on the second surface and has a second opening, and the first opening and the second opening are connected to each other to form a chip accommodating cavity together. In addition, a manufacturing method of the package carrier and a chip package structure having the package carrier are also provided.
    Type: Application
    Filed: September 7, 2016
    Publication date: January 4, 2018
    Applicant: Unimicron Technology Corp.
    Inventors: Yung-Ching Lin, Chen-Chun Liu
  • Patent number: 9433108
    Abstract: A method for fabricating a circuit board structure having at least an embedded electronic element is disclosed, which includes the steps of: providing a substrate and embedding at least an electronic element in the substrate with an active surface and a plurality of electrode pads of the electronic element exposed from a surface of the substrate; forming a plurality of conductive bumps on the electrode pads of the electronic element; and covering the surface of the substrate and the active surface of the electronic element with a dielectric layer and a metal layer stacked on the dielectric layer, wherein the conductive bumps penetrate the dielectric layer so as to be in contact with the metal layer, thereby simplifying the fabrication process, reducing the fabrication cost and saving the fabrication time.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: August 30, 2016
    Assignee: Unimicron Technology Corporation
    Inventors: Yung-Ching Lin, Chih-Kuie Yang, Ta-Han Lin
  • Publication number: 20140201992
    Abstract: A method for fabricating a circuit board structure having at least an embedded electronic element is disclosed, which includes the steps of: providing a substrate and embedding at least an electronic element in the substrate with an active surface and a plurality of electrode pads of the electronic element exposed from a surface of the substrate; forming a plurality of conductive bumps on the electrode pads of the electronic element; and covering the surface of the substrate and the active surface of the electronic element with a dielectric layer and a metal layer stacked on the dielectric layer, wherein the conductive bumps penetrate the dielectric layer so as to be in contact with the metal layer, thereby simplifying the fabrication process, reducing the fabrication cost and saving the fabrication time.
    Type: Application
    Filed: December 5, 2013
    Publication date: July 24, 2014
    Applicant: UNIMICRON TECHNOLOGY CORPORATION
    Inventors: Yung-Ching Lin, Chih-Kuie Yang, Ta-Han Lin
  • Patent number: 8143963
    Abstract: A voltage source circuit for a crystal oscillation circuit is provided, in which the voltage source circuit and the crystal oscillation circuit are formed with the same process. The voltage source circuit includes a current source, a first PMOS, a first NMOS and a regulator unit. The current source is coupled between a voltage source and an output terminal, in which the output terminal outputs a reference voltage. Both of the gates and drains of the first PMOS and the NMOS are coupled to each other, and the first PMOS and the first NMOS are coupled between the output terminal and a ground. The regulator unit generates a work voltage to the crystal oscillation circuit as a voltage source of the crystal oscillation circuit according to the reference voltage.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: March 27, 2012
    Assignee: eMemory Technology Inc.
    Inventors: Yung-Ching Lin, Chia-Chun Hsu
  • Publication number: 20110298556
    Abstract: A voltage source circuit for a crystal oscillation circuit is provided, in which the voltage source circuit and the crystal oscillation circuit are formed with the same process. The voltage source circuit includes a current source, a first PMOS, a first NMOS and a regulator unit. The current source is coupled between a voltage source and an output terminal, in which the output terminal outputs a reference voltage. Both of the gates and drains of the first PMOS and the NMOS are coupled to each other, and the first PMOS and the first NMOS are coupled between the output terminal and a ground. The regulator unit generates a work voltage to the crystal oscillation circuit as a voltage source of the crystal oscillation circuit according to the reference voltage.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Applicant: EMEMORY TECHNOLOGY INC.
    Inventors: Yung-Ching Lin, Chia-Chun Hsu
  • Publication number: 20100248085
    Abstract: The present invention relates to a flow field plate of a fuel cell with airflow guiding gaskets, comprising a flat plate and airflow guiding gaskets. Each side of the flat plate has a reaction area, which includes a plurality of ribs and a plurality of grooves. Two airflow guiding gasket are respectively covered on the two sides of the flat plate, and a central hollowed region of each airflow guiding gasket is corresponding to the reaction area. An inlet hole of the flat plate communicates with the hollowed region and each inlet of the grooves through an inlet trough of the airflow guiding gasket. An outlet hole of the flat plate communicates with the hollowed region and each outlet of the grooves through an outlet trough of the airflow guiding gasket. Thus, the present invention is capable of significantly reducing the volume of the fuel cell and lowering the weight.
    Type: Application
    Filed: July 17, 2009
    Publication date: September 30, 2010
    Applicant: Tatung Company
    Inventors: Sun-Wei Chang, Chung-Wen Chih, Chu-Hsueh Yu, Yung-Ching Lin
  • Publication number: 20070029058
    Abstract: A hanging structure for sunshade device, comprising a hanging unit, an edge strip set, at least an elastic element, and at least a pin-joint element is disclosed. The hanging unit has a hanging member formed at its head and a tail piece formed at its end; the edge strip set has at least one slot; the elastic element is disposed between the edge strip set and the hanging unit; and the pin-joint element adjoins the hanging unit to the slot of edge strip set that allows the hanging unit to swing in the slot. When the sunshade device is folded, the hanging unit forms a first intersection angle with the horizontal line; when the sunshade device is unfolded, the hanging unit forms a second intersection angle with the horizontal line.
    Type: Application
    Filed: August 3, 2005
    Publication date: February 8, 2007
    Applicant: Macauto Industrial Co., Ltd.
    Inventor: Yung-Ching Lin
  • Patent number: 6937684
    Abstract: A differential phase discriminator includes a phase compensation circuit to compensate for timing drift and error for recovering timing information in a digital phase lock loop. The differential phase discriminator uses a differential phase detector to compute the phase difference of two consecutive frequency domain signal samples. The phase compensation circuit determines a phase correction term by computing the difference between the absolute values of the real and imaginary parts of a frequency domain signal sample. A weighting factor is computed by adjusting the sum of the absolute values of the real and imaginary parts of the frequency domain signal sample with a ratio adjustment factor. A phase compensation value is then computed by multiplying the phase correction term by the weighting factor. The phase compensation value is added to the uncorrected output of the differential phase detector.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: August 30, 2005
    Assignee: Silicon Integrated Systems Corporation
    Inventors: Ching-Kae Tzou, Yung Ching Lin
  • Publication number: 20030063700
    Abstract: A differential phase discriminator includes a phase compensation circuit to compensate for timing drift and error for recovering timing information in a digital phase lock loop. The differential phase discriminator uses a differential phase detector to compute the phase difference of two consecutive frequency domain signal samples. The phase compensation circuit determines a phase correction term by computing the difference between the absolute values of the real and imaginary parts of a frequency domain signal sample. A weighting factor is computed by adjusting the sum of the absolute values of the real and imaginary parts of the frequency domain signal sample with a ratio adjustment factor. A phase compensation value is then computed by multiplying the phase correction term by the weighting factor. The phase compensation value is added to the uncorrected output of the differential phase detector.
    Type: Application
    Filed: October 2, 2001
    Publication date: April 3, 2003
    Inventors: Ching-Kae Tzou, Yung Ching Lin
  • Patent number: 6079683
    Abstract: An angle adjustable support is to be used for supporting a sun-shade device, and includes a base with a pair of pivot lobes, a retaining member having a coupling portion adapted for coupling with the sun-shade device and a retaining projection which is pivoted on the pivot lobes, and an adjusting unit which includes a stationary clamping member disposed below the retaining projection and having a first retaining surface, a movable clamping member disposed below the retaining projecting and having a second retaining surface, and a regulating rod that extends threadedly through the movable clamping member and that is coupled rotatably to the stationary clamping member.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: June 27, 2000
    Inventor: Yung-Ching Lin
  • Patent number: 6079474
    Abstract: A sun-shade assembly includes a stationary curved shaft, a tubular roller, a screen, and a torsion spring. The roller is made of a resilient material, and is sleeved rotatably around the shaft. The roller has a curvature conforming with that of the shaft. The screen is wound around the roller, and has a lower edge connected to the roller and an upper edge provided with a stretch rod which has a curvature conforming with that of the shaft. The torsion spring has a first end secured to the roller, and an opposite second end secured to the shaft. The screen is unwound from the roller when the stretch rod is pulled away from the roller, thereby resulting in rotation of the roller about the shaft in a first direction against biasing force of the torsion spring. The torsion spring biases the roller to rotate about the shaft in a second direction opposite to the first direction to result in winding of the screen onto the roller.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: June 27, 2000
    Inventor: Yung-Ching Lin
  • Patent number: 5791721
    Abstract: A motorized sun screen for covering a vehicle window has a base unit and a screen unit which includes a lower horizontal rod mounted rotatably on the base unit, an upper horizontal shaft and a screen with a bottom edge connected to the horizontal rod and a top edge connected to the horizontal shaft. Each of a pair of pivot arms has a lower end portion mounted pivotally on the base unit and an upper end portion slidably engaging the horizontal shaft. An extension spring has two ends connected respectively to the lower end portion of the pivot arms. A drive unit is mounted on the base unit and includes a motor with a rotatable drive shaft which is coupled to one end of the horizontal rod. The motor is operable in a first mode, wherein the motor permits the extension spring to contract, thereby causing the pivot arms to pivot away from each other to move the horizontal shaft upwardly and stretch the screen.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: August 11, 1998
    Inventor: Yung-Ching Lin
  • Patent number: D1036381
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: July 23, 2024
    Assignees: CHAMP TECH OPTICAL (FOSHAN) CORPORATION, Foxconn Technology Co., Ltd.
    Inventors: Yu-Ching Lin, Yung-Ping Lin, You-Zhi Lu, Xiao-Guang Ma, Li-Ping Wang, Jing-Shu Chen