Patents by Inventor Yung-Chun Wu

Yung-Chun Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9076764
    Abstract: An asymmetric gate tunneling transistor includes a substrate, a first-polarity portion, a second-polarity portion, a channel portion, a gate structure and an insulation body. The first-polarity portion and the second-polarity portion are disposed on the substrate. The channel portion is connected with the first-polarity portion and the second-polarity portion, and includes a first section and a second section. The gate structure includes an enveloping portion surrounding the first section, and a flat portion covering one side of the second section away from the substrate. The insulation body includes a first insulation portion disposed between the first section and the enveloping portion, and a second insulation portion disposed between the second section and the flat portion. Through the asymmetric design of the gate structure, the tunneling transistor is offered with features of a high ON current and a low OFF current.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: July 7, 2015
    Assignee: National Tsing Hua University
    Inventors: Yung-Chun Wu, Yi-Ruei Jhan
  • Publication number: 20150156839
    Abstract: A method and an apparatus for adjusting color temperature or luminance of lamp are provided in the present invention. The lamp at least includes a white light and a warm white light, and the method includes the steps of: providing a control interface circuit, which is configured at the position of the lamp switch on the wall, wherein the control interface circuit receives an AC signal and outputs a phase chopping signal according to a user's operation; asymmetrically cutting the AC signal to obtain the phase chopping signal when the user uses the control interface circuit to adjust a luminance and/or a color temperature.
    Type: Application
    Filed: December 1, 2014
    Publication date: June 4, 2015
    Inventors: YU-KAI CHEN, CHAU-CHUNG SONG, YUNG-CHUN WU, CHIN-HSIUNG CHANG
  • Publication number: 20150021654
    Abstract: An asymmetric gate tunneling transistor includes a substrate, a first-polarity portion, a second-polarity portion, a channel portion, a gate structure and an insulation body. The first-polarity portion and the second-polarity portion are disposed on the substrate. The channel portion is connected with the first-polarity portion and the second-polarity portion, and includes a first section and a second section. The gate structure includes an enveloping portion surrounding the first section, and a flat portion covering one side of the second section away from the substrate. The insulation body includes a first insulation portion disposed between the first section and the enveloping portion, and a second insulation portion disposed between the second section and the flat portion. Through the asymmetric design of the gate structure, the tunneling transistor is offered with features of a high ON current and a low OFF current.
    Type: Application
    Filed: October 11, 2013
    Publication date: January 22, 2015
    Applicant: National Tsing Hua University
    Inventors: Yung-Chun WU, Yi-Ruei JHAN
  • Publication number: 20140291739
    Abstract: A junction-less transistor having an reverse polarity structure includes a substrate, a semiconductor body, a gate and a gate insulation layer. The substrate has a first polarity. The semiconductor body is disposed on the substrate, and includes a drain, a source and a channel section connected between the drain and the source. The gate covers one side of the channel section away from the substrate. The semiconductor body has a second polarity opposite to the first polarity. With the semiconductor body and the substrate respectively having the opposite second polarity and first polarity, a leakage current can be reduced while also lowering element production costs.
    Type: Application
    Filed: January 2, 2014
    Publication date: October 2, 2014
    Applicant: National Tsing Hua Univesity
    Inventors: Yung-Chun Wu, Ming-Hung Han, Hung-Bin Chen
  • Publication number: 20120015474
    Abstract: The present invention discloses a method for fabricating a silicon heterojunction solar cell. The silicon heterojunction solar cell according to the present invention comprises a first conductive silicon substrate; a first intrinsic silicon layer and a second intrinsic silicon layer respectively formed on two sides of the first conductive silicon substrate and jointed with the first conductive silicon substrate to form silicon heterojunctions; a second conductive silicon layer and a first conductive heavily-doped silicon layer respectively formed on the first intrinsic silicon layer and the second intrinsic silicon layer, wherein the second conductive silicon layer and the first conductive heavily-doped silicon layer are formed via an ion implantation method, whereby is optimized the thickness and doped quality of the second conductive silicon layer and the first conductive heavily-doped silicon layer.
    Type: Application
    Filed: July 19, 2010
    Publication date: January 19, 2012
    Inventors: Yung-Chun Wu, Shih-Hsien Yang
  • Publication number: 20090261744
    Abstract: A phase-control dimming electronic ballast system and the control method thereof, wherein the system includes a phase controller, a converter, an inverter and a system controller. Moreover, the system controller senses a firing angle from the phase controller, and adjusts the output voltage of the converter and the switching frequency of the inverter to achieve the operation of dimming fluorescent lamp.
    Type: Application
    Filed: July 9, 2008
    Publication date: October 22, 2009
    Inventors: Yu-Kai Chen, Yung Chun Wu, Wen-Yang Wang, Chin-Hsiung Chang
  • Publication number: 20090187363
    Abstract: A method for optimization of a frequency spectrum includes the following steps: sampling a time domain signal to obtain an initial sampling signal based upon a first subset of sample points; transforming the initial sampling signal to a frequency domain signal; determining a frequency parameter and an amplitude parameter for each of harmonic components of the frequency domain signal; establishing a leakage energy equation and a graduation shifting quantity; determining an optimum number of sample points that will result in minimum leakage energy; obtaining an adjusted sampling signal based on a second subset of the sample points, wherein the number of the sample points in the second subset is equal to the optimum number; and transforming the adjusted sampling signal to an optimized frequency domain signal having harmonic components associated with graduations of an optimized frequency spectrum, wherein the graduations are calculated based upon the graduation shifting quantity.
    Type: Application
    Filed: January 13, 2009
    Publication date: July 23, 2009
    Applicant: I SHOU UNIVERSITY
    Inventors: Rong-Ching Wu, Ching-Tai Chiang, Yung-Chun Wu
  • Patent number: 7102326
    Abstract: A motor variator and a driving method thereof are provided for controlling the operating speed of a fan, which employ an alternate current chopper to change the working cycle and the rotary speed of a stepless motor. The motor variator includes a high-frequency alternate current chopper connected to an induction coil of an induction motor, an alternate current power supply connected to the high-frequency alternate current chopper and a controller connected to the high-frequency alternate current chopper for outputting a switch signal to the high-frequency alternate current chopper, such that the high-frequency alternate current chopper is controlled by the switch signal to perform a chopper action for the alternate current power supply and output a drive voltage, so as to change the rotary speed of the induction motor.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: September 5, 2006
    Assignee: Fego Precision Industrial Co., Ltd.
    Inventors: Yu-Kai Chen, Tsai-Fu Wu, Wen-Yang Wang, Yung-Chun Wu, Chin-Hsiung Chang
  • Patent number: 6949006
    Abstract: A speed adjuster is provided in a belt-disc sander for controlling the rotating speed of a motor of the belt-disc sander. A speed adjust knob is disposed outside the belt-disc sander. The speed adjuster has a control circuit, a current sensor, a drive circuit, and a converter. The current sensor detects the motor current and feeds back to the control circuit, which controls the frequency variation of a SPWM signal of the drive circuit in response to the input of the speed adjust knob. The converter transforms the square wave voltage into an AC voltage for driving the motor. The desired rotating speed can be adjusted through the speed adjust knob. The control circuit will compare the present rotating speed of the motor with the set rotating speed to determine whether the present rotating speed conforms to the set one for correcting the rotating speed of the motor.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: September 27, 2005
    Assignee: Fego Precision Industrial Co., Ltd.
    Inventors: Yu-Kai Chen, Tsai-Fu Wu, Yung-Chun Wu, Wen-Yang Wang, Chin-Hsiung Chang
  • Patent number: 6894352
    Abstract: A method for fabricating a single-electron transistor (SET). A one dimensional channel is formed between source and drain on a silicon-on-insulator substrate, and the separated polysilicon sidewall spacer gates are formed by electron-beam lithographically etching process in a self-aligned manner. Operation of the single-electron transistor with self-aligned polysilicon sidewall spacer gates is achieved by applying external bias to the self-aligned polysilicon sidewall spacer gates to form two potential barriers and a quantum dot capable of storage charges between the two potential barriers. A metal upper gate is finally formed and biased to induce a two-dimensional electron gas (2DEG) and control the energy level of the quantum well.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: May 17, 2005
    Inventors: Shu-Fen Hu, Yung-Chun Wu, Wen-Tai Lu, Shiue-Shin Liu, Tiao-Yuan Huang, Tien-Sheng Chao
  • Patent number: 6876159
    Abstract: An electronic ballast system with emergency lighting features is presented. Especially, the electronic ballast system is relative to a single-stage converter configuration. The electronic ballast system serves as a regular ballast, a regular/emergency ballast, a battery charger or discharger and a power failure detector, fulfilling emergency lighting features. The single-stage converter used in the ballast is an integration of a bi-directional flyback converter and two half-bridge series-resonant parallel-loaded inverters. Unlike conventional approaches, the rectified and filtered input voltage is directly added to a set of battery voltages in the proposed system, so as to reduce the fabrication cost by simplifying the circuit configuration and the number of active switching elements.
    Type: Grant
    Filed: November 28, 2003
    Date of Patent: April 5, 2005
    Assignee: Fego Precision Industrial CO, Ltd.
    Inventors: Yung-Chun Wu, Yu-Kai Chen, Tsai-Fu Wu, Chin-Hsiung Chang
  • Publication number: 20040061173
    Abstract: A method for fabricating a single-electron transistor (SET). A one dimensional channel is formed between source and drain on a silicon-on-insulator substrate, and the separated polysilicon sidewall spacer gates are formed by electron-beam lithographically etching process in a self-aligned manner. Operation of the single-electron transistor with self-aligned polysilicon sidewall spacer gates is achieved by applying external bias to the self-aligned polysilicon sidewall spacer gates to form two potential barriers and a quantum dot capable of storage charges between the two potential barriers. A metal upper gate is finally formed and biased to induce a two-dimensional electron gas (2DEG) and control the energy level of the quantum well.
    Type: Application
    Filed: June 25, 2003
    Publication date: April 1, 2004
    Inventors: Shu-Fen Hu, Yung-Chun Wu, Wen-Tai Lu, Shiue-Shin Liu, Tiao-Yuan Huang, Tien-Sheng Chao
  • Patent number: 6624599
    Abstract: A compact single-stage electronic ballast circuit for emergency lighting applications, integrating the functions of a flyback charger, a flyback discharger and a half-bridge series resonant parallel loaded electronic ballast into a single-stage electronic ballast. The present invention only employs two active switches so as to achieve an electronic ballast for emergency lighting applications when the electricity is out. Furthermore, the present invention reduces the fabrication cost by simplifying the circuit configuration and reducing the number of employed active switching elements.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: September 23, 2003
    Assignee: Fego Precision Industrial Co., Ltd.
    Inventors: Yu-Kai Chen, Tsai-Fu Wu, Yung-Chun Wu, Chin-Hsiung Chang
  • Publication number: 20030173907
    Abstract: A compact single-stage electronic ballast circuit for emergency lighting applications, integrating the functions of a flyback charger, a flyback discharger and a half-bridge series resonant parallel loaded electronic ballast into a single-stage electronic ballast. The present invention only employs two active switches so as to achieve an electronic ballast for emergency lighting applications when the electricity is out. Furthermore, the present invention reduces the fabrication cost by simplifying the circuit configuration and reducing the number of employed active switching elements.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 18, 2003
    Applicant: FEGO PRECISION INDUSTRIAL CO., LTD.
    Inventors: Yu-Kai Chen, Tsai-Fu Wu, Yung-Chun Wu, Chin-Hsiung Chang