Patents by Inventor Yung-Chung Kao

Yung-Chung Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160224493
    Abstract: A Universal Serial Bus (USB) keyboard-video-mouse (KVM) switch for connection between at least one host and at least one USB device is disclosed. The USB KVM switch includes a first virtual USB hub, a first virtual USB device, a microprocessor and a first multi-address USB device control module. The first virtual USB hub is configured to communicate with a first host. The first virtual USB device is configured to communicate with the first host via the first virtual USB hub, and is provided with endpoint setting data identical with that of a first USB device. The microprocessor is configured to generate the first virtual USB hub, and enumerate the first USB device in response to electrical connection of the first USB device to the USB KVM switch.
    Type: Application
    Filed: January 29, 2016
    Publication date: August 4, 2016
    Inventors: CHUAN CHIEH WANG, BORBIN YAN, YUNG CHUNG KAO, JUI-FENG HSIEH, CHENG YUAN LEE
  • Patent number: 6521042
    Abstract: Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of mass spectrometer (204) signals based on a process model. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: February 18, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Francis G. Celii, Alan J. Katz, Yung-Chung Kao, Theodore S. Moise
  • Publication number: 20030018814
    Abstract: A method of letting a single LAN port VoIP (voice over IP) device have network address translation function by means of the application of NAT (network address translation) technique of translating the private IP address of an organization into a global IP address for use in the Internet to a VoIP device having a single LAN port to let multiple handsets of the VoIP device use a global IP address in the Internet to connect the Internet through a network apparatus and to perform Internet telephone communication through the VoIP address.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 23, 2003
    Inventors: Yung-Chung Kao, Ching-Chung Chiang, Wei-Che Yu
  • Patent number: 6139483
    Abstract: A method of fabricating a quantum well device is presented which includes forming one or more quantum wells 48 by forming an epitaxy mask followed by selective deposition of one or more epitaxial layers. Selective deposition is accomplished by forming an epitaxy mask by sidewall defined masking, followed by epitaxial deposition of one or more layers (e.g. barrier layers 40 and 44 and a quantum layer 42) The epitaxy mask is formed by patterning an e-beam resist layer (e.g. polymethylmethacrylate 36), conformally depositing a glass layer (e.g. SiO.sub.2 38) on the resist, anisotropically etching the SiO.sub.2, and then removing the e-beam resist layer. The epitaxy mask fabrication technique allows patterning to define geometries that are much smaller than the beam itself and thereby provides the means required to define nanometer dimensioned horizontal (lateral) structures on and within epitaxial layers.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: October 31, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Alan C. Seabaugh, Yung Chung Kao, Andrew J. Purdes, John N. Randall
  • Patent number: 5985025
    Abstract: Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of mass spectrometer (204) signals based on a process model. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
    Type: Grant
    Filed: February 1, 1995
    Date of Patent: November 16, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Francis G. Celii, Alan J. Katz, Yung-Chung Kao, Theodore S. Moise
  • Patent number: 5744375
    Abstract: Heteroepitaxy of lattice-mismatched semiconductor materials such as GaAs on silicon is accomplished by first growing GaAs (104) on silicon (102), then growing a lattice matched cap of Al.sub.z Ga.sub.1-z,As (106), next annealing out defects with the Al.sub.z Ga.sub.1-z As cap (106) limiting desorption of gallium, lastly growing further GaAs (110) directly on the cap. The lattice matched cap is also used as an implant anneal cap.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: April 28, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Yung-Chung Kao, Donald L. Plumton
  • Patent number: 5659188
    Abstract: Heteroepitaxy of lattice-mismatched semiconductor materials such as GaAs on silicon is accomplished by first growing GaAs (104) on silicon (102), then growing a lattice matched cap of Al.sub.x Ga.sub.1-x As (106), next annealing out defects with the Al.sub.x Ga.sub.1-x As cap (106) limiting desorption of gallium, lastly growing further GaAs (110) directly on the cap. The lattice matched cap is also used as an implant anneal cap.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 19, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Yung-Chung Kao, Donald L. Plumton
  • Patent number: 5625204
    Abstract: A molecular beam epitaxy (MBE) system (10) is provided to grow thin film, epitaxy layers (44, 46, 48, 50) on compound semiconductor substrates (40). A mass spectrometer detector (95) is used to monitor and control the flux from selected sources (21, 23, 25, 27) within the MBE system (10). A uniform layer of indium gallium arsenide (46, 50) may be grown on a semiconductor substrate (40) by controlling the indium flux with respect to substrate (40) temperature and time. An epitaxy layer (46) of indium gallium arsenide with uniform mole fraction concentration and reduced lattice strain is produced.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 29, 1997
    Assignee: Texas Instruements Incorporated
    Inventors: Yung-Chung Kao, Francis G. Celii
  • Patent number: 5556462
    Abstract: Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of integrated mass spectormeter (204) signals. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: September 17, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Francis G. Celii, Yung-Chung Kao, Andrew J. Purdes
  • Patent number: 5490880
    Abstract: A molecular beam epitaxy (MBE) system (10) is provided to grow thin film, epitaxy layers (44, 46, 48, 50) on compound semiconductor substrates (40). A mass spectrometer detector (95) is used to monitor and control the flux from selected sources (21, 23, 25, 27) within the MBE system (10). A uniform layer of indium gallium arsenide (46, 50) may be grown on a semiconductor substrate (40) by controlling the indium flux with respect to substrate (40) temperature and time. An epitaxy layer (46) of indium gallium arsenide with uniform mole fraction concentration and reduced lattice strain is produced.
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: February 13, 1996
    Assignee: Texas Instruments, Incorporated
    Inventors: Yung-Chung Kao, Francis G. Celii
  • Patent number: 5415128
    Abstract: This invention describes a multi-deposition system, whereby directing elemental or molecular source fluxes across a substrate in an asymmetrical manner and rotating the substrate at low rotation speeds, a superlattice is formed having a composition of A(x-.DELTA.x)B(1-(x-.DELTA.x))/A(x+.DELTA.x)B(1-(x+.DELTA.x) where .DELTA.x is a function of the nonuniform focusing of the elemental or molecular source fluxes A and B. More specifically, superlattices 18 are formed in the ternary and quaternary In(GaAl)As alloys on InP by molecular beam epitaxy without mechanical shuttering. The superlattice 18 is formed by nonuniformly directing the group III elements 22 and 24 onto the substrate 26 and rotating the substrate 26 across the beams. Periodic ordering is produced by rotation of the substrate 26 through a nonuniform distribution of source fluxes at the rotating substrate 26. The growth rate and substrate rotation rate together determine the superlattice period.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: May 16, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Yung-Chung Kao, Hung-Yu Lin, Alan C. Seabaugh, James H. Luscombe
  • Patent number: 5400739
    Abstract: A molecular beam epitaxy (MBE) system (10) is provided to grow thin film, epitaxy layers (44, 46, 48, 50) on compound semiconductor substrates (40). A mass spectrometer detector (95) is used to monitor and control the flux from selected sources (21, 23, 25, 27) within the MBE system (10). A uniform layer of indium gallium arsenide (46, 50) may be grown on a semiconductor substrate (40) by controlling the indium flux with respect to substrate (40) temperature and time. An epitaxy layer (46) of indium gallium arsenide with uniform mole fraction concentration and reduced lattice strain is produced.
    Type: Grant
    Filed: October 9, 1992
    Date of Patent: March 28, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Yung-Chung Kao, Francis G. Celii
  • Patent number: 5399521
    Abstract: Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of integrated mass spectormeter (204) signals. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
    Type: Grant
    Filed: October 8, 1993
    Date of Patent: March 21, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Francis G. Celii, Yung-Chung Kao, Andrew J. Purdes
  • Patent number: 5391515
    Abstract: Heteroepitaxy of lattice-mismatched semiconductor materials such as GaAs on silicon is accomplished by first growing GaAs (104) on silicon (102), then growing a lattice matched cap of Al.sub.x Ga.sub.1-x As (106), next annealing out defects with the Al.sub.x Ga.sub.1-x As cap (106) limiting desorption of gallium, lastly growing further GaAs (110) directly on the cap. The lattice matched cap is also used as an implant anneal cap.
    Type: Grant
    Filed: June 17, 1992
    Date of Patent: February 21, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Yung-Chung Kao, Donald L. Plumton
  • Patent number: 5084409
    Abstract: Shadow masking layer (130) is undercut during etch of sidewall layer (120) thus preventing sidewall growth during growth of heteroepitaxial region (140), resulting in a planar structure with a high integrity of crystal in the grown region (140).
    Type: Grant
    Filed: June 26, 1990
    Date of Patent: January 28, 1992
    Assignee: Texas Instruments Incorporated
    Inventors: Edward A. Beam, III, Yung-Chung Kao