Patents by Inventor Yung F. Chong

Yung F. Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7485524
    Abstract: The present invention relates to improved metal-oxide-semiconductor field effect transistor (MOSFET) devices comprising source and drain (S/D) regions having slanted upper surfaces with respect to a substrate surface. Such S/D regions may comprise semiconductor structures that are epitaxially grown in surface recesses in a semiconductor substrate. The surface recesses preferable each has a bottom surface that is parallel to the substrate surface, which is oriented along one of a first set of equivalent crystal planes, and one or more sidewall surfaces that are oriented along a second, different set of equivalent crystal planes. The slanted upper surfaces of the S/D regions function to improve the stress profile in the channel region as well as to reduce contact resistance of the MOSFET. Such S/D regions with slanted upper surfaces can be readily formed by crystallographic etching of the semiconductor substrate, followed by epitaxial growth of a semiconductor material.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: February 3, 2009
    Assignees: International Business Machines Corporation, Chartered Semiconductor Manufacturing Ltd.
    Inventors: Zhijiong Luo, Yung F. Chong, Judson R. Holt, Zhao Lun, Huilong Zhu
  • Publication number: 20080006854
    Abstract: The present invention relates to improved metal-oxide-semiconductor field effect transistor (MOSFET) devices comprising source and drain (S/D) regions having slanted upper surfaces with respect to a substrate surface. Such S/D regions may comprise semiconductor structures that are epitaxially grown in surface recesses in a semiconductor substrate. The surface recesses preferable each has a bottom surface that is parallel to the substrate surface, which is oriented along one of a first set of equivalent crystal planes, and one or more sidewall surfaces that are oriented along a second, different set of equivalent crystal planes. The slanted upper surfaces of the S/D regions function to improve the stress profile in the channel region as well as to reduce contact resistance of the MOSFET. Such S/D regions with slanted upper surfaces can be readily formed by crystallographic etching of the semiconductor substrate, followed by epitaxial growth of a semiconductor material.
    Type: Application
    Filed: June 21, 2006
    Publication date: January 10, 2008
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, CHARTERED SEMICONDUCTOR MANUFACTURING LTD
    Inventors: Zhijiong Luo, Yung F. Chong, Judson R. Holt, Zhao Lun, Huilong Zhu