Abstract: A leadless semiconductor package includes a lead frame, an adhesive, a chip, a plurality of first electrically conductive wires and a plurality of second electrically conductive wires. In this case, the lead frame has a chip paddle, a plurality of leads surrounding the chip paddle. The chip paddle has a cavity and a grounding area surrounding the cavity. The cavity has an opening, a bottom and a through hole, and the bottom is larger than the opening in size. The adhesive is disposed in the cavity. The chip have an active surface and a back surface opposed to the active surface, and the back surface is disposed in the cavity and is attached to the lead frame through the adhesive. The first electrically conductive wires electrically connect the leads and the chip. The second electrically conductive wires electrically connect the grounding area and the chip.

Abstract: A leadless semiconductor package mainly comprises a leadless lead-frame, a chip, a silver paste and a plurality of electrically conductive wires. The leadless lead-frame includes a chip paddle and a plurality of leads surrounding the chip paddle wherein the chip paddle has a cavity serving as a chip disposal area and a grounding area encompassing the cavity. The chip is disposed in the cavity so that the back surface of the chip faces the chip paddle and attached onto the chip paddle via the silver paste. Moreover, the chip is electrically connected to the leads. The grounding area is at the periphery of the chip paddle, and furthermore it is protruded from the chip disposal area so as to prevent the silver paste from overflowing on the grounding area. Thus, the electrically conductive wires will attach onto the grounding area well and enhance the electrical performance of the leadless semiconductor package.