Patents by Inventor Yung-Hsin Lin

Yung-Hsin Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144430
    Abstract: A computing system performs artificial-intelligence (AI) super-resolution (SR). The computing system includes multiple processors, which further includes a graphics processing unit (GPU) and an AI processing unit (APU). The computing system also includes a memory to store AI models. When detecting an indication that the loading of the GPU exceeds a threshold, the processors reduce the resolution of a video output from the GPU in response to the indication. One of the AI models is selected based on graphics scenes in the video and the respective power consumption estimates of the AI models. The processors then perform AI SR operations on the video using the selected AI model to restore the resolution of the video for display.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 2, 2024
    Inventors: Chien-Nan Lin, You-Ming Tsao, Yung-Hsin Chu, An-Li Wang
  • Publication number: 20240100743
    Abstract: A separation apparatus suitable for separating plastic and silicone in a composite material includes a storage tank configured to store a hydrocarbon solvent, and a reaction tank fluidly connected to the storage tank and having a reaction space for placement of the composite material therein and for receiving the hydrocarbon solvent from the storage tank such that the composite material is immersed in the hydrocarbon solvent for separating the plastic and the silicone in the composite material. The plastic and the silicone in the composite material are insoluble in the hydrocarbon solvent.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 28, 2024
    Applicants: Taiwan Green Point Enterprises Co., Ltd., Jabil Circuit (Singapore) Pte. Ltd.
    Inventors: Bing-Yuan Lin, Ying-Yin Chen, Yung-Chih Chen, Ching-Hsin Chen
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240063198
    Abstract: A pixel unit includes a thin film circuit unit and a light emitting device. The thin film circuit unit includes a first driving device having a first terminal, a second terminal, and a control terminal. The first terminal can receive a first signal. The control terminal can receive a second signal to control on/off of the first driving device for allowing the first signal transmitted to the second terminal. The light emitting device includes a plurality of light-emitting elements connected in series and connected to the second terminal, wherein a total voltage of the plurality of light-emitting elements is not less than 1/3 of a saturation voltage of the first driving device.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 22, 2024
    Inventors: Shao-You DENG, Yung-Hsin LIN, Yu-Yun CHEN
  • Patent number: 9685590
    Abstract: The present invention relates to a light-emitting diode (LED), which comprises electrodes having a single metal reflective layer. The single metal reflective layer is thicker than the active layer of the LED. Thereby, at least a portion of light emitted from the active layer is reflected by the single metal reflective layer, and thus enhancing the light-emitting efficiency of the LED.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: June 20, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Yu-Yun Chen, Yung-Hsin Lin, Fang-I Li, Shyi-Ming Pan
  • Publication number: 20170104134
    Abstract: The present invention relates to a light-emitting diode (LED), which comprises electrodes having a single metal reflective layer. The single metal reflective layer is thicker than the active layer of the LED. Thereby, at least a portion of light emitted from the active layer is reflected by the single metal reflective layer, and thus enhancing the light-emitting efficiency of the LED.
    Type: Application
    Filed: November 18, 2016
    Publication date: April 13, 2017
    Inventors: Yu-Yun CHEN, Yung-Hsin LIN, Fang-I LI, Shyi-Ming PAN
  • Patent number: 9502616
    Abstract: The present invention relates to a light-emitting diode (LED), which comprises electrodes having a single metal reflective layer. The single metal reflective layer is thicker than the active layer of the LED. Thereby, at least a portion of light emitted from the active layer is reflected by the single metal reflective layer, and thus enhancing the light-emitting efficiency of the LED.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: November 22, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Yu-Yun Chen, Yung-Hsin Lin, Fang-I Li, Shyi-Ming Pan
  • Patent number: 9490409
    Abstract: A light emitting diode (LED) chip including a first type semiconductor layer, an light-emitting layer, a second type semiconductor layer, a current blocking layer, a transparent conductive layer and an electrode is provided. The light-emitting layer is disposed on the first type semiconductor layer. The second type semiconductor layer is disposed on the light-emitting layer. The current blocking layer is disposed on the second type semiconductor layer. The transparent conductive layer is disposed on the second type semiconductor layer and covered the current blocking layer. The electrode is disposed on the transparent conductive layer corresponding to the current blocking layer. The current blocking layer and the electrode respectively have a first width and a second width in a cross section view, and the first width of the current blocking layer is larger than the second width of the electrode.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: November 8, 2016
    Assignee: FORMOSA EPITAXY INCORPORATION
    Inventors: Chih-Hsuan Lu, Yu-Yun Chen, Yung-Hsin Lin, Fang-I Li, Shyi-Ming Pan
  • Publication number: 20160087155
    Abstract: The present invention relates to a light-emitting diode (LED), which comprises electrodes having a single metal reflective layer. The single metal reflective layer is thicker than the active layer of the LED. Thereby, at least a portion of light emitted from the active layer is reflected by the single metal reflective layer, and thus enhancing the light-emitting efficiency of the LED.
    Type: Application
    Filed: March 9, 2015
    Publication date: March 24, 2016
    Inventors: YU-YUN CHEN, YUNG-HSIN LIN, FANG-I LI, SHYI-MING PAN
  • Publication number: 20150008475
    Abstract: A light emitting diode (LED) chip including a first type semiconductor layer, an light-emitting layer, a second type semiconductor layer, a current blocking layer, a transparent conductive layer and an electrode is provided. The light-emitting layer is disposed on the first type semiconductor layer. The second type semiconductor layer is disposed on the light-emitting layer. The current blocking layer is disposed on the second type semiconductor layer. The transparent conductive layer is disposed on the second type semiconductor layer and covered the current blocking layer. The electrode is disposed on the transparent conductive layer corresponding to the current blocking layer. The current blocking layer and the electrode respectively have a first width and a second width in a cross section view, and the first width of the current blocking layer is larger than the second width of the electrode.
    Type: Application
    Filed: September 19, 2014
    Publication date: January 8, 2015
    Inventors: Chih-Hsuan Lu, Yu-Yun Chen, Yung-Hsin Lin, Fang-I Li, Shyi-Ming Pan
  • Patent number: 8767129
    Abstract: A demodulator comprises a reference voltage generating circuit for generating a reference voltage, a reference resistor for converting the reference voltage to a reference current, a current digital-to-analog converter (IDAC) for receiving a digital code and generating an output signal, a comparison apparatus for comparing the reference voltage with the output signal to generate a comparison output, and a calibration apparatus for updating the digital code according to the comparison output to calibrate the IDAC.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: July 1, 2014
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chun-Kai Wei, Yung-Hsin Lin
  • Publication number: 20130033646
    Abstract: A demodulator comprises a reference voltage generating circuit for generating a reference voltage, a reference resistor for converting the reference voltage to a reference current, a current digital-to-analog converter (IDAC) for receiving a digital code and generating an output signal, a comparison apparatus for comparing the reference voltage with the output signal to generate a comparison output, and a calibration apparatus for updating the digital code according to the comparison output to calibrate the IDAC.
    Type: Application
    Filed: October 12, 2012
    Publication date: February 7, 2013
    Applicant: MStar Semiconductor, Inc.
    Inventors: Chun-Kai Wei, Yung-Hsin Lin
  • Patent number: 8363169
    Abstract: A demodulator comprises a reference voltage generating circuit for generating a reference voltage, a reference resistor for converting the reference voltage to a reference current, a current digital-to-analog converter (IDAC) for receiving a digital code and generating an output signal, a comparison apparatus for comparing the reference voltage with the output signal to generate a comparison output, and a calibration apparatus for updating the digital code according to the comparison output to calibrate the IDAC.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: January 29, 2013
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chun-Kai Wei, Yung-Hsin Lin
  • Publication number: 20110007222
    Abstract: A demodulator comprises a reference voltage generating circuit for generating a reference voltage, a reference resistor for converting the reference voltage to a reference current, a current digital-to-analog converter (IDAC) for receiving a digital code and generating an output signal, a comparison apparatus for comparing the reference voltage with the output signal to generate a comparison output, and a calibration apparatus for updating the digital code according to the comparison output to calibrate the IDAC.
    Type: Application
    Filed: July 9, 2010
    Publication date: January 13, 2011
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventors: Chun-Kai Wei, Yung-Hsin Lin
  • Patent number: 7701179
    Abstract: A control circuit of a multi-mode buck-boost switching regulator and a method thereof are provided. The control circuit imposes ON/OFF timing sequences on switches according to the relationship between two controlling triangle waves and the load fluctuation. In each working cycle of each mode of the regulator, at most two switches perform switching operations. The control circuit is simple to design, which only includes simple digital elements, such as comparators, logic gates etc., instead of complicated analog circuits.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: April 20, 2010
    Assignee: Faraday Technology Corp.
    Inventors: Ke-Horng Chen, Yung-Hsin Lin, Cheng-Ta Yu
  • Publication number: 20080303499
    Abstract: A control circuit of a multi-mode buck-boost switching regulator and a method thereof are provided. The control circuit imposes ON/OFF timing sequences on switches according to the relationship between two controlling triangle waves and the load fluctuation. In each working cycle of each mode of the regulator, at most two switches perform switching operations. The control circuit is simple to design, which only includes simple digital elements, such as comparators, logic gates etc., instead of complicated analog circuits.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 11, 2008
    Applicant: FARADAY TECHNOLOGY CORP.
    Inventors: Ke-Horng Chen, Yung-Hsin Lin, Cheng-Ta Yu
  • Publication number: 20060149392
    Abstract: The present invention is directed to compositions and methods of using compositions comprising a scaffold with growth factors chemically immobilized thereto for inducing chondrogenesis and/or osteogenesis when implanted in vivo or osteogenesis or chondrogenesis in cultures in vitro. The compositions and methods enhance bone and cartilage growth. Also described are compositions and methods for targeted drug delivery.
    Type: Application
    Filed: December 6, 2005
    Publication date: July 6, 2006
    Inventors: Kuo-Huang Hsieh, Ken-Yu Chang, Chun-Pin Lin, Liou Horng, Yung-Hsin Lin