Abstract: An electrical connector assembly includes a wire end connector and a board end connector. The board end connector includes a first housing, a slot, and a plurality of conductive terminals. The conductive terminals are disposed in the slot. The wire end connector is detachably connected to the board end connector. The board end connector includes a second housing and a tongue plate. The wire end connector has four sidewalls that define an accommodating space. The tongue plate is disposed in the accommodating space. The tongue plate is connected to a cable assembly, and a surface of the tongue plate is provided with a plurality of contact pads. When the board end connector is docked with the wire end connector, the tongue plate is inserted into the slot, so that the contact pads electrical contact the conductive terminals, and the first housing is inserted into the accommodating space.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes the following operations: energizing an integrated circuit (IC) on a wafer by raising a voltage of the IC to a first voltage level during a first period, and applying to the IC a stress signal including a first sequence and a second sequence during a second period subsequent to the first period, each of the first sequence and the second sequence having a ramp-up stage and a ramp-down stage. The stress signal causes the voltage of the IC to fluctuate between a second voltage level and a third voltage level, wherein a duration of the first sequence is longer than that of the second sequence.

Abstract: The present disclosure provides a radiation detector, including a substrate, a pixel array formed on the substrate, a perovskite thick film formed on the pixel array and having a cubic crystal phase, a first electrode formed on the perovskite thick film and is opposite to the pixel array, and a readout circuit. The radiation detector has significantly reduced dark current density and high sensing sensitivity. The present disclosure also provides a method for preparing the perovskite thick film.

Abstract: A connector is provided. The connector is configured to mate with a docking connector. The connector includes an insulating base, a lock structure, an elastic arm, and a drawstring. One end of the insulating base has a docking interface. The lock structure is disposed on one side of the insulating base. The lock structure is configured to engage with a docking lock structure of the docking connector. The elastic arm is disposed on the insulating base, and one end of the elastic arm is arranged at one side of one end of the lock structure. One end of the drawstring and the elastic arm are connected to each other, and another end of the drawstring is exposed from another end of the insulating base. The elastic arm is moved by the drawstring so as to press the end of the lock structure.

Abstract: A connector includes a connecting body, a cover case, an elastic arm, and a drawstring. The connecting body has a locking structure configured for engaging with a docking connector. The cover case is connected to the connecting body. One end of the elastic arm is connected to the cover case, and the elastic arm has a connection structure. A free end of the elastic arm is arranged at one side of the locking structure. One end of the drawstring is fixed to the connection structure, and another end of the drawstring passes through the cover case. When the drawstring is pulled in a direction away from the cover case, the drawstring moves the elastic arm through the connection structure to press the free end of the elastic arm, and another end of the locking structure is elastically deformed in a direction away from the docking connector.

Abstract: A sight adjusting mechanism includes an adjusting knob, an adjusting ring member, an adjusting bolt and a base. An upper-side portion of the adjusting bolt enters a through hole of the adjusting ring member to couple with the adjusting ring member. A lower-side portion of the adjusting bolt enters a through hole of the base to couple with the base. Thus, the adjusting bolt can only move along an axis. The mechanism is implemented without mechanical feedback, and thus rotating angles are improved with great precision. Also, the mechanism includes a limiting member disposed in a penetrating hole of the adjusting knob and a positioning ring mounted on the adjusting ring member. By cooperation of the limiting member and the positioning ring, an angle at which the adjusting knob can rotate is defined. A fine adjustment and a quick adjustment of a sight point are implemented.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The system includes a signal generator and a module. The signal generator is configured to apply an initial signal to an input terminal of a DUT during a first period; and apply a stress signal to the input terminal in a second period. The module is configured to: obtain an output signal in response to the initial signal and the stress signal at an output terminal of the DUT, the output signal in response to the stress signal including a first sequence and a second sequence, each of the first sequence and the second sequence having a ramp-up stage and a ramp-down stage, wherein a duration of the first sequence is longer than that of the second sequence; and compare the output signal with the stress signal.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes the following operations: energizing an integrated circuit (IC) on a wafer by raising a voltage of the IC to a first voltage level during a first period, and applying to the IC a stress signal including a first sequence and a second sequence during a second period subsequent to the first period, each of the first sequence and the second sequence having a ramp-up stage and a ramp-down stage. The stress signal causes the voltage of the IC to fluctuate between a second voltage level and a third voltage level, wherein a duration of the first sequence is longer than that of the second sequence.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes providing a device under test (DUT) having an input terminal and an output terminal; applying a voltage having a first voltage level to the input terminal of the DUT during a first period; applying a stress signal to the input terminal of the DUT during a second period subsequent to the first period; obtaining an output signal in response to the stress signal at the output terminal of the DUT; and comparing the output signal with the stress signal. The stress signal includes a plurality of sequences, each having a ramp-up stage and a ramp-down stage. The stress signal has a second voltage level and a third voltage level.

Abstract: A board connector and a board-to-board connection assembly are provided. The board connector includes an insulating body and a plurality of female terminals. The insulating body includes a plurality of female-terminal slots. At least one of the female terminals includes at least two sheet structures. The at least two sheet structures of the at least one of the female terminals are disposed in one of the female-terminal slots. A section of each of the at least two sheet structures located in the female-terminal slot has an elastic arm.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes the following operations. A wafer having an IC formed thereon is provided. The IC is energized by raising the voltage of the IC to a first voltage level during a first period. A stress signal is applied to the IC. The stress signal includes a plurality of sequences during a second period subsequent to the first period. Each of the sequence has a ramp-up stage and a ramp-down stage. The stress signal causes the voltage of the IC to fluctuate between a second voltage level and a third voltage level. Whether the IC complies with a test criterion is determined after applying the stress signal.

Abstract: The present disclosure provides a radiation detector, including a substrate, a pixel array formed on the substrate, a perovskite thick film formed on the pixel array and having a cubic crystal phase, a first electrode formed on the perovskite thick film and is opposite to the pixel array, and a readout circuit. The radiation detector has significantly reduced dark current density and high sensing sensitivity. The present disclosure also provides a method for preparing the perovskite thick film.

Abstract: A method of transmitting data and command through an RS232 serial port incorporated with a user-end device and a server-end device connected through the RS232 serial port is disclosed and includes following steps: accumulating a value of a first counter of the user-end device and a value of a second counter of the server-end device whenever a data is transmitted from the server-end device to the user-end device; controlling the server-end device to stop transmitting the data and to wait when both of the two values reach a triggering threshold; controlling the user-end device to transmit a control command to the server-end device through the RS232 serial port while the server-end device is waiting; and, resetting the first and the second counter and controlling the server-end device to restore to transmit the data to the user-end device after a waiting time is elapsed.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes providing a device under test (DUT) having an input terminal and an output terminal; applying a voltage having a first voltage level to the input terminal of the DUT during a first period; applying a stress signal to the input terminal of the DUT during a second period subsequent to the first period; obtaining an output signal in response to the stress signal at the output terminal of the DUT; and comparing the output signal with the stress signal. The stress signal includes a plurality of sequences, each having a ramp-up stage and a ramp-down stage. The stress signal has a second voltage level and a third voltage level.

Abstract: Provided is a perovskite film including crystal grains with a crystalline structure of [A][B][X]3.n[C], wherein [A], [B], [X], [C] and n are as defined in the specification. The present disclosure further provides a precursor composition of perovskite film, method for producing of perovskite film, and semiconductor element including such films, as described above. With the optimal lattice arrangement, the perovskite film shows the effects of small surface roughness, and the semiconductor element thereof can thus achieve high efficiency and stability even with large area of film formation, thereby indeed having prospect of the application.

Abstract: A method of transmitting data and command through an RS232 serial port incorporated with a user-end device and a server-end device connected through the RS232 serial port is disclosed and includes following steps: accumulating a value of a first counter of the user-end device and a value of a second counter of the server-end device whenever a data is transmitted from the server-end device to the user-end device; controlling the server-end device to stop transmitting the data and to wait when both of the two values reach a triggering threshold; controlling the user-end device to transmit a control command to the server-end device through the RS232 serial port while the server-end device is waiting; and, resetting the first and the second counter and controlling the server-end device to restore to transmit the data to the user-end device after a waiting time is elapsed.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes providing a device under test (DUT) having an input terminal and an output terminal; applying a voltage having a first voltage level to the input terminal of the DUT during a first period; applying a stress signal to the input terminal of the DUT during a second period subsequent to the first period; obtaining an output signal in response to the stress signal at the output terminal of the DUT; and comparing the output signal with the stress signal. The stress signal includes a plurality of sequences, each having a ramp-up stage and a ramp-down stage. The stress signal has a second voltage level and a third voltage level.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes the following operations. A wafer having an IC formed thereon is provided. The IC is energized by raising the voltage of the IC to a first voltage level during a first period. A stress signal is applied to the IC. The stress signal includes a plurality of sequences during a second period subsequent to the first period. Each of the sequence has a ramp-up stage and a ramp-down stage. The stress signal causes the voltage of the IC to fluctuate between a second voltage level and a third voltage level. Whether the IC complies with a test criterion is determined after applying the stress signal.

Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes the following operations. A wafer having an IC formed thereon is provided. The IC is energized by raising the voltage of the IC to a first voltage level during a first period. A stress signal is applied to the IC. The stress signal includes a plurality of sequences during a second period subsequent to the first period. Each of the sequence has a ramp-up stage and a ramp-down stage. The stress signal causes the voltage of the IC to fluctuate between a second voltage level and a third voltage level. Whether the IC complies with a test criterion is determined after applying the stress signal.

Abstract: Provided is a method for preparing lead iodide, which controls the crystal form of lead iodide through temperature, including: dissolving a lead compound in a first acid solution and adding an iodine compound to form a reaction solution including the first lead iodide; and heating the reaction solution to a temperature of 60° C. or more and standing at a constant temperature, to obtain the second lead iodide, wherein a peak intensity of the (003) crystal plane of the second lead iodide is greater than or equal to a peak intensity of the (110) crystal plane. Provided is also a method for preparing the perovskite film.