Abstract: An artificial bone plate unit and an assembleable artificial bone plate are provided. The artificial bone plate unit includes a plate body, multiple connecting pins, connecting holes, drug cavities, and drug-releasing openings. The plate body has two main surfaces and a peripheral surface connected between the two main surfaces. The connecting pins and the connecting holes are formed on the plate body and arranged along the peripheral surface on the plate body. The connecting holes correspond in shape to the connecting pins. The drug cavities are formed in the artificial bone plate unit and are connected to the drug-releasing openings. The artificial bone plate units are connected using the connecting pins and the connecting holes to form the assembleable artificial bone plate. The assembleable artificial bone plate can be bent into the shape of a defect area of the skull, which saves material and time.

Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.

Abstract: A wireless device comprises a transceiving circuit, configured to receive a plurality of beam performance parameters corresponding to a plurality beams; a storage circuit, configured to store a table, wherein corresponding relationships between the plurality beams and the plurality of beam performance parameters are tabulated in the table; and a processing circuit, configured to perform the following steps: selecting a first beam according to the table; determining whether a first beam performance value corresponding to the first beam is less than a threshold; and selecting a second beam according to the table when the first beam performance value is less than the threshold.

Abstract: A wireless device comprises a transceiving circuit, configured to receive a plurality of beam performance parameters corresponding to a plurality beams; a storage circuit, configured to store a table, wherein corresponding relationships between the plurality beams and the plurality of beam performance parameters are tabulated in the table; and a processing circuit, configured to perform the following steps: selecting a first beam according to the table; determining whether a first beam performance value corresponding to the first beam is less than a threshold; and selecting a second beam according to the table when the first beam performance value is less than the threshold.

Abstract: An antenna control method for controlling an antenna device to switch between a plurality of beams. The antenna control method includes the steps of: (a) using the beams for communication one after another, and performing a scanning process on each of the beams, so as to retrieve a communication quality parameter; (b) comparing all of the communication quality parameters with each other, and selecting one of the beams as a main communication beam, wherein the selected beam has the best communication quality parameter; (c) performing a saturation determination process on the main communication beam; and (d) when the main communication beam causes saturation of a power amplifier, switching to another beam which is adjacent to the main communication beam as a substitute communication beam.

Abstract: An antenna control method for controlling an antenna device to switch between a plurality of beams. The antenna control method includes the steps of: (a) using the beams for communication one after another, and performing a scanning process on each of the beams, so as to retrieve a communication quality parameter; (b) comparing all of the communication quality parameters with each other, and selecting one of the beams as a main communication beam, wherein the selected beam has the best communication quality parameter; (c) performing a saturation determination process on the main communication beam; and (d) when the main communication beam causes saturation of a power amplifier, switching to another beam which is adjacent to the main communication beam as a substitute communication beam.

Abstract: The present invention provides a CDMA RAKE receiver that computes a data detection using Fast Fourier Transform (FFT) matched filters. Signals received are processed in frequency domain by the RAKE receiver. The RAKE receiver includes a pilot signal spreading code matched filter, a data signal spreading code matched filter and a channel matched filter. The pilot signal spreading code matched filter removes a spreading code of the pilot signal. The data signal spreading code matched filter removes a multiple access spreading code of the data signal. A channel matched filter estimates the channel frequency response and combine the received data signal from different paths before a decision is made. For increasing the CDMA system capacity, the RAKE receiver uses a interference cancellation method. A downlink receiver at a mobile station estimates the interference of a pilot signal and subtracts the pilot interference from the received signal before data detection.

Abstract: A synchronization system and method for obtaining frame, carrier, and sampling synchronization of an input OFDM modulated digital signal having a pseudoperiodic second symbol. The system includes an apparatus for obtaining frame synchronization, and the apparatus includes an envelope detector to detect the first symbol of the input signal, and a differentiator connected to the envelope detector to detect the second symbol. The differentiator includes a first filter having a transfer function H(z)=(1+z.sup.-1) and a second filter having a transfer function H.sub.p (z)=(1-z.sup.-n/2 +z.sup.-n -z.sup.-3n/2), where n equals to a number of samples in the input signal. Synchronization of the carrier frequency offset is obtained by first obtaining the fractional carrier frequency offset, and then obtaining the integral carrier frequency offset through a matched filtering process. Sampling frequency synchronization is obtained through the matched filtering process for determining integral carrier frequency offset.

Abstract: A synchronization system for an input signal having a plurality of OFDM symbols, each symbol having at least one guard interval, includes a correlation device for providing a product of the input signal with a complex conjugate of the input signal delayed for a predetermined period, an arithmetic device for obtaining an argument value of the product, and a detection device for detecting a transition in phase values of an output of the arithmetic device, wherein the transition occurring when the phase value in one portion of the symbol duration is substantially smaller than another portion of the symbol duration. The system additionally includes a power estimator for detecting an OFDM symbol frame of the input signal with reference to a predetermined threshold, and a device for estimating fractional carrier frequency offset.

Abstract: A demodulating system for estimating frequency offset and sampling time error by a Fast Fourier Transform operation, which receives a modulated signal sent from a GMSK (Gaussian Low-Pass Filtered Minimum Shift Keying) or a MSK (Minimum Shift Keying) transmitter and demodulates the signal. The demodulating system uses a Fast Fourier Transform converter to obtain frequency offset and sampling time error by applying to it an initial demodulated result generated from a discriminator or a phase differentiator.

Abstract: A one-bit differential detector for a GMSK signal operates independently of an offset frequency. In particular, a decision signal used by a decision circuit to distinguish between logic "0" and logic "1" is always equal to sin[.DELTA..phi.(T)]. The inventive detector has an improved bit error rate performance in comparison to the prior art.