Patents by Inventor Yung Nan WU

Yung Nan WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11980076
    Abstract: A tiled display device includes two panels and two cover layers respectively disposed on the two panels. The two cover layers include a contact region. A top portion and a bottom portion of the contact region have a height H. One of the two cover layers has a thickness Tn. One of the two panels has a distance Xn between an upper surface of the one of the two panels and the bottom portion of the contact region. The one of the two panels is corresponding to the one of the two cover layers. The height H, the thickness Tn and the distance Xn satisfy the equation: 0<H/(Xn+Tn)<0.8.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: May 7, 2024
    Assignee: InnoLux Corporation
    Inventors: Ping-Hsun Tsai, Shih-Fu Liao, I-An Yao, Yu-Chun Hsu, Yung-Hsun Wu, Sheng-Nan Fan
  • Patent number: 9622348
    Abstract: A multilayer circuit board includes a plurality of stacked substrates, a plurality of first conductive lands, and a plurality of second conductive lands. A surface at a side of each of the substrates has an exposed portion which is not covered by the neighboring substrate, wherein each of the first conductive lands is respectively provided on each of the exposed portions. Each of the second conductive lands is provided on the exposed portion of the outermost substrate, wherein each of the substrates has a conductor pattern to be electrically connected to one of the first conductive lands and to one of the second conductive lands.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: April 11, 2017
    Assignee: MPI CORPORATION
    Inventors: Wei-Cheng Ku, Jun-Liang Lai, Chun-Chung Huang, Jing-Zhi Hung, Yung Nan Wu, Chih-Hao Ho
  • Publication number: 20150014046
    Abstract: A multilayer circuit board includes a plurality of stacked substrates, a plurality of first conductive lands, and a plurality of second conductive lands. A surface at a side of each of the substrates has an exposed portion which is not covered by the neighboring substrate, wherein each of the first conductive lands is respectively provided on each of the exposed portions. Each of the second conductive lands is provided on the exposed portion of the outermost substrate, wherein each of the substrates has a conductor pattern to be electrically connected to one of the first conductive lands and to one of the second conductive lands.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 15, 2015
    Applicant: MPI CORPORATION
    Inventors: Wei-Cheng KU, Jun-Liang LAI, Chun-Chung HUANG, Jing-Zhi HUNG, Yung Nan WU, Chih-Hao HO
  • Publication number: 20150015291
    Abstract: A cantilever probe card, which is provided between a device under test (DUT) and a tester, includes a carrier board, a probe base, two probes, and a transmission device. The carrier board is provided with through holes. The probe base is provided on the carrier board, and the probes are mounted to the probe base. Each probe has a tip to contact a test pad of the DUT. The transmission device is flexible, and has signal circuits. The transmission device passes through the through hole on the carrier board, and the signal circuits connect the probes to the tester respectively.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 15, 2015
    Applicant: MPI CORPORATION
    Inventors: WEI-CHENG KU, Jun-Liang Lai, Chun-Chung HUANG, Jing-Zhi Hung, Yung Nan Wu, CHIH-HAO HO