Patents by Inventor Yung-Pei CHIN

Yung-Pei CHIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Layout decomposition method
    Patent number: 8959460
    Abstract: A method of assigning layout patterns includes identifying a first set of layout patterns of a current layout design that is new or has been modified in comparison with a reference layout design. A second set of layout patterns of the current layout design is identified. A member of the second set of layout patterns that is not a member of the first set of layout patterns has a distance, less than a predetermined threshold distance, to at least another member of the second set of layout patterns. A third set of layout patterns is not modified in comparison with the reference layout design. The third set of layout patterns is assigned to a plurality of masks according to the reference pattern-assigning result.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: February 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chun Huang, Ming-Hui Chih, Chia-Ping Chiang, Ru-Gun Liu, Tsai-Sheng Gau, Jia-Guei Jou, Chih-Chung Huang, Dong-Hsu Cheng, Yung-Pei Chin
  • LAYOUT DECOMPOSITION METHOD
    Publication number: 20150040082
    Abstract: A method of assigning layout patterns includes identifying a first set of layout patterns of a current layout design that is new or has been modified in comparison with a reference layout design. A second set of layout patterns of the current layout design is identified. A member of the second set of layout patterns that is not a member of the first set of layout patterns has a distance, less than a predetermined threshold distance, to at least another member of the second set of layout patterns. A third set of layout patterns is not modified in comparison with the reference layout design. The third set of layout patterns is assigned to a plurality of masks according to the reference pattern-assigning result.
    Type: Application
    Filed: July 31, 2013
    Publication date: February 5, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMAPNY, LTD.
    Inventors: Wen-Chun HUANG, Ming-Hui CHIH, Chia-Ping CHIANG, Ru-Gun LIU, Tsai-Sheng GAU, Jia-Guei JOU, Chih-Chung HUANG, Dong-Hsu CHENG, Yung-Pei CHIN