Abstract: A surface plasmon resonance imaging apparatus is provided. The surface plasmon resonance imaging apparatus includes a light irradiation unit configured to irradiate polarized light onto a metal coating film provided on one surface of a prism, a light modulator configured to spatially pattern-encode light reflected by the metal coating film and the prism, a light detector configured to detect a pattern-encoded light signal, obtained through pattern-encoding by the light modulator, as a spectral signal, a signal processor configured to spatially decode the spectral signal and analyze a decoded spectral signal to generate characteristic data of a sample provided on the metal coating film, and an output unit configured to output the characteristic data of the sample as a two-dimensional (2D) image.

Abstract: The disclosure relates to a non-dispersive infrared (NDIR) gas sensor which detects the concentration of gas with a simple structure and method by manufacturing an optical waveguide with a gas-permeable polymer material instead of a conventional cavity or chamber type. An optical signal travels through the optical waveguide of gas-permeable polymer by total internal reflection, and the gas naturally penetrates the optical waveguide without the use of separate inlet and outlet openings, so that the optical signal and gas particles come into contact with each other within the optical waveguide. Since the optical signal detected by a photodetector at the other end of the optical waveguide after traveling while contacting the gas particles has properties changed according to the concentration of the gas which they have contacted in the optical waveguide, it is possible to measure the concentration of a specific gas from the detected optical signal.

Abstract: A method of manufacturing a multilayer ceramic electronic component includes: preparing a plurality of first ceramic sheets; forming internal electrode patterns on the first ceramic sheets using a conductive paste, respectively; stacking the first ceramic sheets on which the internal electrode pattern is formed to form a ceramic body including internal electrodes disposed therein to face each other; forming electrode layers by transferring a nickel-containing sheet on both end surfaces of the ceramic body in a length direction of the ceramic body so as to be connected to the internal electrodes, respectively; forming electrically insulating layers by attaching a second ceramic sheet for forming an electrically insulating layer to the electrode layers, respectively; and preparing external electrodes by forming plating layers on one surface of the ceramic body in a thickness direction of the ceramic body, to be connected to the electrode layers, respectively.

Abstract: A multilayer ceramic capacitor includes a capacitor body including a plurality of first to third internal electrodes. The first internal electrodes have opposing ends exposed at third and fourth surfaces of the capacitor body. The second internal electrodes have a portion exposed at either of fifth or sixth surfaces of the capacitor body. The third internal electrodes have portions respectively exposed at the fifth and sixth surfaces. First and second external electrodes are on the third and fourth surfaces, respectively, and are connected to the first internal electrodes. Third and fourth external electrodes are on the fifth and sixth surfaces, respectively, and are connected to the second and third internal electrodes.

Abstract: A multilayer ceramic electronic component includes: a ceramic body including dielectric layers and internal electrodes, stacked to be alternately exposed to one end surface and the other end surface of the ceramic body, with each of the dielectric layers interposed therebetween; and external electrodes disposed on outer surfaces of the ceramic body. The external electrodes include electrode layers connected to the internal electrodes, electrically insulating layers disposed on the electrode layers, and plating layers disposed on one surface of the ceramic body in a thickness direction of the ceramic body and connected to the electrode layers, respectively, and the electrode layers contain nickel.

Abstract: A multilayer ceramic electronic component includes: a ceramic body including dielectric layers and internal electrodes, stacked to be alternately exposed to one end surface and the other end surface of the ceramic body, with each of the dielectric layers interposed therebetween; and external electrodes disposed on outer surfaces of the ceramic body. The external electrodes include electrode layers connected to the internal electrodes, electrically insulating layers disposed on the electrode layers, and plating layers disposed on one surface of the ceramic body in a thickness direction of the ceramic body and connected to the electrode layers, respectively, and the electrode layers contain nickel.

Abstract: A multilayer ceramic capacitor includes a capacitor body including a plurality of first to third internal electrodes. The first internal electrodes have opposing ends exposed at third and fourth surfaces of the capacitor body. The second internal electrodes have a portion exposed at either of fifth or sixth surfaces of the capacitor body. The third internal electrodes have portions respectively exposed at the fifth and sixth surfaces. First and second external electrodes are on the third and fourth surfaces, respectively, and are connected to the first internal electrodes. Third and fourth external electrodes are on the fifth and sixth surfaces, respectively, and are connected to the second and third internal electrodes.

Abstract: A multilayer ceramic electronic component includes: a ceramic body including dielectric layers and internal electrodes, stacked to be alternately exposed to one end surface and the other end surface of the ceramic body, with each of the dielectric layers interposed therebetween; and external electrodes disposed on outer surfaces of the ceramic body. The external electrodes include electrode layers connected to the internal electrodes, electrically insulating layers disposed on the electrode layers, and plating layers disposed on one surface of the ceramic body in a thickness direction of the ceramic body and connected to the electrode layers, respectively, and the electrode layers contain nickel.

Abstract: There are provided a multilayer ceramic electronic component and a fabrication method thereof. The multilayer ceramic component includes a ceramic main body in which internal electrodes and dielectric layers are alternately laminated; external electrodes formed on outer surfaces of the ceramic main body; intermediate layers formed on the external electrodes and including one or more selected from the group consisting of nickel, copper, and a nickel-copper alloy; and plating layers formed on the intermediate layers, whereby infiltration of a plating solution can be prevented.

Abstract: A method for manufacturing a vertical light emitting diode of the invention allows an easier process of individually separating chips. A light emitting structure is formed on a growth substrate having a plurality of device areas and at least one device isolation area. The light emitting structure has an n-type clad layer, an active layer and a p-type clad layer sequentially formed therein. Corresponding p-type electrodes are formed on the light emitting structure on the device areas. A glass substrate having through holes perforated therein is provided on the p-electrodes so that the through holes are disposed corresponding to the p-electrodes. Also, the through holes are plated with a metal material to form patterns of a plating layer on the p-electrodes. Then, the growth substrate is removed to form n-electrodes on the n-type clad layer. The glass substrate is removed via etching.

Abstract: A light emitting diode package is provided. A package body has a mounting part surrounded by side walls and lead electrodes on a bottom surface of the mounting part. A light emitting diode chip is mounted on the bottom surface of the mounting part and electrically connected to the lead electrodes. A resin encapsulant is filled in the mounting part to encapsulate the light emitting diode chip. At least one residual resin storage is formed on a top surface of a corresponding one of the side walls to guide and accommodate a residual resin for forming the encapsulant of a preset height. Further, a storing groove is formed on the top surface of the corresponding side wall and a guiding groove is formed to guide the residual resin to the storing groove. This produces the light emitting diode package with uniform color distribution regardless of a liquid resin amount injected.

Abstract: There is provided a method for manufacturing a vertically structured LED capable of performing a chip separation process with ease. In the method, a light-emitting structure is formed on a growth substrate having a plurality of device regions and at least one device isolation region, wherein the light-emitting structure has an n-type clad layer, an active layer and a p-type clad layer which are disposed on the growth substrate in sequence. A p-electrode is formed on the light-emitting structure. Thereafter, a first plating layer is formed on the p-electrode such that it connects the plurality of device isolation regions. A pattern of a second plating layer is formed on the first plating layer of the device region. The growth substrate is removed, and an n-electrode is then formed on the n-type clad layer.

Abstract: Disclosed herein is a small particle oxide powder for dielectrics. The oxide powder has a perovskite structure, an average particle diameter [D50(?m)] of 0.3 ?m or less, a particle size distribution of the average particle diameter within 3%, a particle size distribution satisfying a condition D99/D50<2.5, a content of OH? groups of 0.2 wt % and a C/A axial ratio of 1.006 or more. A method of manufacturing the oxide powder comprises the steps of mixing TiO2 particles and a compound solved with at least one element represented by A of the perovskite structure of ABO3; drying and pulverizing the mixture of TiO2 and the compound; calcining the pulverized mixture; adding the oxide containing the elements of the site A to the coated TiO2 particles and wet-mixing, drying and pulverizing; primarily calcining and pulverizing the pulverized powder under vacuum; and secondarily calcining and pulverizing the powder.

Abstract: The invention relates to a method of manufacturing a semiconductor light emitting diode. In the method, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer are formed sequentially on a substrate. Then, a nickel oxide (NiOx) film is directly deposited on the p-type semiconductor layer via reactive sputtering or reactive deposition in an oxidizing atmosphere. Also, a light transmissible conductive oxide layer is formed on the nickel oxide film.

Abstract: A nitride semiconductor LED improved in lighting efficiency and a fabrication method thereof, in which an n-doped semiconductor layer is formed on a substrate. An active layer is formed on the n-doped semiconductor layer to expose at least a partial area of the n-doped semiconductor layer. A p-doped semiconductor layer is formed on the active layer. A p+-doped semiconductor layer is formed on the p-doped semiconductor layer. An n+-doped semiconductor layer is formed in at least a partial upper region of the p+-doped semiconductor layer via n-dopant ion implantation. The n+-doped semiconductor layer cooperates with an underlying partial region of the p+-doped semiconductor layer to realize a reverse bias tunneling junction. Also, an upper n-doped semiconductor layer is formed on the n+-doped semiconductor layer to realize lateral current spreading. The invention can improve lighting efficiency by using the reverse bias tunneling junction and/or the lateral current spreading.

Abstract: A nitride semiconductor LED improved in lighting efficiency and a fabrication method thereof, in which an n-doped semiconductor layer is formed on a substrate. An active layer is formed on the n-doped semiconductor layer to expose at least a partial area of the n-doped semiconductor layer. A p-doped semiconductor layer is formed on the active layer. A p+-doped semiconductor layer is formed on the p-doped semiconductor layer. An n+-doped semiconductor layer is formed in at least a partial upper region of the p+-doped semiconductor layer via n-dopant ion implantation. The n+-doped semiconductor layer cooperates with an underlying partial region of the p+-doped semiconductor layer to realize a reverse bias tunneling junction. Also, an upper n-doped semiconductor layer is formed on the n+-doped semiconductor layer to realize lateral current spreading. The invention can improve lighting efficiency by using the reverse bias tunneling junction and/or the lateral current spreading.

Abstract: Disclosed is a nitride semiconductor LED and a fabrication method thereof. An n-doped semiconductor layer, an active layer, a p-doped semiconductor layer and a p+-doped semiconductor layer are formed in their order on a substrate. A resultant semiconductor structure is mesa-etched to expose a partial area of the n-doped semiconductor layer. The p+-doped semiconductor layer and the exposed area of the n-doped semiconductor layer are n-doped at a high concentration to form first and second n+-doped regions, respectively. P- and n-electrodes are formed on the first and second n+-doped regions, respectively. Then, reverse bias is created to improve an ohmic contact structure between a semiconductor layer and a metal electrode thereby lowering drive voltage while raising overvoltage resistance and luminance.