Patents by Inventor Yung-Sheng Lin

Yung-Sheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139142
    Abstract: Provided is a method for preventing or treating a liver disease, including administering a therapeutically effective amount of pharmaceutical composition to a subject in need, and the pharmaceutical composition includes the isothiocyanate structural modified compound and a pharmaceutically acceptable carrier thereof.
    Type: Application
    Filed: September 14, 2023
    Publication date: May 2, 2024
    Applicants: TAIPEI VETERANS GENERAL HOSPITAL, NATIONAL YANG MING CHIAO TUNG UNIVERSITY, PHARMAESSENTIA CORPORATION
    Inventors: Jaw-Ching WU, Yung-Sheng CHANG, Kuo-Hsi KAO, Chan-Kou HWANG, Ko-Chung LIN
  • Publication number: 20240102194
    Abstract: A plating system and a method thereof are disclosed. The plating system performs a N-stage plating drilling filling process in which a M-th stage plating drilling filling process with a M-th current density is performed on a hole of a substrate for a M-th plating time to form a M-th plating layer on the to-be-plated layer, wherein N is a positive integer equal to or greater than 3, and M is a positive integer positive integer in a range of 1 to N. Therefore, the technical effect of providing a higher drilling filling rate than conventional plating filling technology under a condition that a total thickness of plating layers is fixed can be achieved.
    Type: Application
    Filed: August 7, 2023
    Publication date: March 28, 2024
    Inventors: Cheng-EN HO, Yu-Lian CHEN, Cheng-Chi WANG, Yu-Jen CHANG, Yung-Sheng LU, Cheng-Yu LEE, Yu-Ming LIN
  • Patent number: 11943608
    Abstract: A Bluetooth communication system includes: a Bluetooth host device; and a Bluetooth device set which including a first member device and a second member device. The first member device is arranged to operably generate and transmit target Bluetooth packets containing an auto-pair request to the Bluetooth host device. The second member device is arranged to operably generate a resolvable set identifier corresponding to the second member device according to a device set identification information. The Bluetooth host device is arranged to operably identify the first member device as a first privileged device according to the auto-pair request in the target Bluetooth packets, and to operably transmit a first privileged pairing notice to the first member device and to operably generate a first cypher key. The first member device further generates a second cypher key corresponding to the first cypher key after receiving the first privileged pairing notice.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: March 26, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yu Hsuan Liu, Yung Chieh Lin, Po Sheng Chiu
  • Patent number: 11943609
    Abstract: A Bluetooth communication system includes: a Bluetooth host device; and a Bluetooth device set which including a first member device and a second member device. The first member device generates a first resolvable set identifier corresponding to the first member device, and generates and transmits target Bluetooth packets containing the first resolvable set identifier to the Bluetooth host device. The second member device generates a resolvable set identifier corresponding to the second member device according to a device set identification information. The Bluetooth host device identifies the first member device as a first privileged device according to the position of the first resolvable set identifier, and transmits a first privileged pairing notice to the first member device and generates a first cypher key. The first member device further generates a second cypher key corresponding to the first cypher key after receiving the first privileged pairing notice.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: March 26, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yu Hsuan Liu, Yung Chieh Lin, Po Sheng Chiu
  • Publication number: 20240096787
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes an interconnection structure over a semiconductor substrate and a conductive pillar over the interconnection structure. The conductive pillar has a protruding portion extending towards the semiconductor substrate from a lower surface of the conductive pillar. The semiconductor device structure also includes an upper conductive via between the conductive pillar and the interconnection structure and a lower conductive via between the upper conductive via and the interconnection structure. The lower conductive via is electrically connected to the conductive pillar through the upper conductive via. The conductive pillar extends across opposite sidewalls of the upper conductive via and opposite sidewalls of the lower conductive via. A top view of an entirety of the second conductive via is separated from a top view of an entirety of the protruding portion.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Ming-Da CHENG, Wei-Hung LIN, Hui-Min HUANG, Chang-Jung HSUEH, Po-Hao TSAI, Yung-Sheng LIN
  • Publication number: 20240089611
    Abstract: The present invention relates to a method of image fusion, which uses the brightness difference of the current frame and the previous frame to determine whether the pixel in a frame image is static or dynamic. If the current pixel is static, the previous corresponding pixel is superimposed onto the current pixel; if the current pixel is dynamic, the previous corresponding pixel is replaced with the current pixel.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Inventors: Ping-Hung Yin, Yung-Ming Chou, Bo-Jia Lin, Yu-Sheng Liao
  • Patent number: 11924631
    Abstract: A Bluetooth communication system includes: a Bluetooth host device; and a Bluetooth device set which including a first member device and a second member device. The Bluetooth host device controls a display device to display a candidate device list, and to display a single device item in the candidate device list to represent the Bluetooth device set, but does not simultaneously display two device items in the candidate device list to represent the first member device and the second member device. The Bluetooth host device generates a first cypher key according to an instruction from the first member device and a device information of the first member device after receiving a selection command. The first member device establishes a connection with the Bluetooth host device, and generates a second cypher key corresponding to the first cypher key according to a device information of the Bluetooth host device.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: March 5, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yu Hsuan Liu, Yung Chieh Lin, Po Sheng Chiu
  • Publication number: 20240027876
    Abstract: An information handling system may include a processor, a memory device, a PMU, and a camera formed into a chassis of the information handling system. The camera includes a lens, a shutter to block the capture of an image by the camera, shutter driver hardware to actuate shutter movement between an open state and a closed state, and a shutter position sensor to detect the position of the shutter. The information handling system includes a microcontroller unit operatively coupled to the camera to receive input describing a set state of the shutter received from user toggle input, compare the set state of the shutter to a detected state of the shutter detected by the shutter position sensor and take remedial action to actuate the shutter driver hardware to change the detected state of the shutter when the detected state of the shutter differs from the set state of the shutter.
    Type: Application
    Filed: July 22, 2022
    Publication date: January 25, 2024
    Applicant: Dell Products, LP
    Inventors: Geroncio O. Tan, Daniel L. Hamlin, Yao-Hsien Huang, Yung-Sheng Lin
  • Publication number: 20240014105
    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes at least one substrate and an interconnection structure. The at least one substrate has a cavity partially defined by an inner sidewall of the at least one substrate and a channel disposed at a bottom of the at least one substrate. The channel laterally penetrates through the at least one substrate. The interconnections structure is disposed over the substrate, and the interconnection structure has a through hole penetrating through the interconnection structure. The through hole, the cavity and the channel are in spatial communication with each other.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Sheng Lin, Cheng-Lung Yang, Chin-Yu Ku, Ming-Da Cheng, Wen-Hsiung Lu, Tang-Wei Huang, Fu Wei Liu
  • Patent number: 11854964
    Abstract: A structure and a formation method of a semiconductor device are provided. The semiconductor device structure includes an interconnection structure over a semiconductor substrate. The semiconductor device structure includes a conductive pillar over the interconnection structure. The conductive pillar has a protruding portion extending towards the semiconductor substrate. The semiconductor device structure includes an upper conductive via between the conductive pillar and the interconnection structure. A center of the upper conductive via is laterally separated from a center of the protruding portion by a first distance. The semiconductor device structure includes a lower conductive via between the upper conductive via and the interconnection structure. The lower conductive via is electrically connected to the conductive pillar through the upper conductive via.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Da Cheng, Wei-Hung Lin, Hui-Min Huang, Chang-Jung Hsueh, Po-Hao Tsai, Yung-Sheng Lin
  • Publication number: 20230352342
    Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.
    Type: Application
    Filed: June 20, 2023
    Publication date: November 2, 2023
    Inventors: Ming-Da Cheng, Wen-Hsiung Lu, Chin Wei Kang, Yung-Han Chuang, Lung-Kai Mao, Yung-Sheng Lin
  • Patent number: 11798907
    Abstract: A semiconductor package includes a first substrate, a first flow channel and a second flow channel. The first flow channel is on the first substrate. The second flow channel is on the first substrate and in fluid communication with the first flow channel. The second flow channel is spaced from an inlet and an outlet of the first flow channel. The first flow channel and the second flow channel constitute a bonding region of the first substrate.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: October 24, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yung-Sheng Lin, Yun-Ching Hung, An-Hsuan Hsu, Chung-Hung Lai
  • Publication number: 20230321795
    Abstract: A pipe plier structure includes a first body, a second body, a pivot member, and a locking member. The first body is provided with multiple first teeth, an arc line, an axis, a first vertical line, a radius, a first angle, and a second angle. The second body is provided with multiple second teeth, multiple third teeth, a second vertical line, a first connecting line, a second connecting line, a third angle, a fourth angle, a concave face, a fifth angle, a sixth angle, a seventh angle, and an eighth angle. The pivot member is assembled with the first body and the second body. The locking member is assembled with the first body and the second body. The locking member provides an elastically restoring force to the first body and the second body after the second body is extended outward relative to the first body.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 12, 2023
    Inventors: Yung-Sheng Lin, Shih-Liang Huang
  • Patent number: 11769716
    Abstract: A semiconductor device and method of forming the same are provided. The semiconductor device includes at least one substrate and an interconnection structure. The at least one substrate has a cavity partially defined by an inner sidewall of the at least one substrate and a channel disposed at a bottom of the at least one substrate. The channel laterally penetrates through the at least one substrate. The interconnections structure is disposed over the substrate, and the interconnection structure has a through hole penetrating through the interconnection structure. The through hole, the cavity and the channel are in spatial communication with each other.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Sheng Lin, Cheng-Lung Yang, Chin-Yu Ku, Ming-Da Cheng, Wen-Hsiung Lu, Tang-Wei Huang, Fu Wei Liu
  • Patent number: 11721579
    Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Da Cheng, Wen-Hsiung Lu, Chin Wei Kang, Yung-Han Chuang, Lung-Kai Mao, Yung-Sheng Lin
  • Publication number: 20230182123
    Abstract: A titanium catalyst and a synthesizing method of polyester resins are provided in the present disclosure. The titanium catalyst has a chemical structure represented by Formula (I), Formula (II) or Formula (III). The symbols shown in the Formula (I), the Formula (II) or the Formula (III) are defined in the description. The synthesizing method of polyester resins includes providing the titanium catalyst, performing a feeding step, performing a heating and pressurizing step and performing a heating and vacuuming step. The titanium catalyst and a heat stabilizer are added into an autoclave before the feeding step or before the heating and vacuuming step.
    Type: Application
    Filed: May 10, 2022
    Publication date: June 15, 2023
    Inventors: Yi-Chou TSAI, John Di Yi OU, Chuan-Sheng HUANG, Yung-Sheng LIN
  • Patent number: 11669639
    Abstract: A system for configuring an information handling system based on a multi-user state change. An intelligent sensor hub communicates with sensors to detect the number of persons in a field of view of the information handling system. When the intelligent sensor hub determines there is a change in the number of persons, the information is sent out-of-band to an embedded controller (EC) independent of a host operating system. The EC makes a change to the configuration of the information handling system if needed.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: June 6, 2023
    Assignee: Dell Products L.P.
    Inventors: Vivek Viswanathan Iyer, Daniel Lawrence Hamlin, Yung-Sheng Lin
  • Publication number: 20230063127
    Abstract: A structure and a formation method of a semiconductor device are provided. The semiconductor device structure includes a semiconductor substrate and an interconnection structure over the semiconductor substrate. The semiconductor device structure also includes a first conductive pillar over the interconnection structure. The first conductive pillar has a first protruding portion extending towards the semiconductor substrate from a lower surface of the first conductive pillar. The semiconductor device structure further includes a second conductive pillar over the interconnection structure. The second conductive pillar has a second protruding portion extending towards the semiconductor substrate from a lower surface of the second conductive pillar. The first conductive pillar is closer to a center point of the semiconductor substrate than the second conductive pillar. A bottom of the second protruding portion is wider than a bottom of the first protruding portion.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Hui-Min HUANG, Ming-Da CHENG, Wei-Hung LIN, Chang-Jung HSUEH, Kai-Jun ZHAN, Yung-Sheng LIN
  • Publication number: 20230065724
    Abstract: A structure and a formation method of a semiconductor device are provided. The semiconductor device structure includes an interconnection structure over a semiconductor substrate. The semiconductor device structure includes a conductive pillar over the interconnection structure. The conductive pillar has a protruding portion extending towards the semiconductor substrate. The semiconductor device structure includes an upper conductive via between the conductive pillar and the interconnection structure. A center of the upper conductive via is laterally separated from a center of the protruding portion by a first distance. The semiconductor device structure includes a lower conductive via between the upper conductive via and the interconnection structure. The lower conductive via is electrically connected to the conductive pillar through the upper conductive via.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Ming-Da Cheng, Wei-Hung Lin, Hui-Min Huang, Chang-Jung Hsueh, Po-Hao Tsai, Yung-Sheng Lin
  • Publication number: 20230067143
    Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes a first conductive line over the substrate. The chip structure includes an insulating layer over the substrate and the first conductive line. The chip structure includes a conductive pillar over the insulating layer. The conductive pillar is formed in one piece, the conductive pillar has a lower surface, a protruding connecting portion, and a protruding locking portion, the protruding connecting portion protrudes from the lower surface and passes through the insulating layer and is in direct contact with the first conductive line, the protruding locking portion protrudes from the lower surface and is embedded in the insulating layer. The chip structure includes a solder bump on the conductive pillar. The solder bump is in direct contact with the conductive pillar.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Hui-Min HUANG, Ming-Da CHENG, Wei-Hung LIN, Chang-Jung HSUEH, Kai-Jun ZHAN, Yung-Sheng LIN