Patents by Inventor Yung-Sheng Wei

Yung-Sheng Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8135011
    Abstract: The present invention provides method for operating a multipoint control system, which includes a plurality of controlled units serially connected and each controlled unit has a execution unit and an interpretive unit having a data processing unit and a memory unit, utilizes start packets pass through every one of controlled units which could be modified and transmitted to the next stage to achieve addressing for all of the system. Specifically, an information stream including a first start packet including a first leading message and a plurality of first data packets are transmitted by a controller, and a first address in the first start packet is modified by data processing unit and transmitted to the next stage. In addition, a first data packet corresponding to the first address is retrieved by the interpretive unit and the execution unit is enabled by the interpretive unit.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: March 13, 2012
    Assignee: Macroblock, Inc.
    Inventors: Meng-Hsiu Wei, Hsien-Jen Chang, Chi-Chang Hung, Yung-Sheng Wei
  • Patent number: 7545178
    Abstract: A signal encoder and a signal decoder involves the signal encoder for receiving a data signal and a clock signal, including a first code output terminal and a second code output terminal. When the data signal is logic one, the signal encoder outputs a modulated signal through the first code output terminal, and outputs a fixed level signal through the second code output terminal. When the data signal is logic zero, the signal encoder outputs the fixed level signal through the first code output terminal, and outputs the modulated signal through the second code output terminal. The signal decoder converts the modulated signal and the fixed level signal output from the signal encoder into the data signal and the clock signal.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: June 9, 2009
    Assignee: Macroblock, Inc.
    Inventors: Chi-Chang Hung, Yung-Sheng Wei, Meng-Hsiu Wei
  • Publication number: 20080315920
    Abstract: A signal encoder and a signal decoder involves the signal encoder for receiving a data signal and a clock signal, including a first code output terminal and a second code output terminal. When the data signal is logic one, the signal encoder outputs a modulated signal through the first code output terminal, and outputs a fixed level signal through the second code output terminal. When the data signal is logic zero, the signal encoder outputs the fixed level signal through the first code output terminal, and outputs the modulated signal through the second code output terminal. The signal decoder converts the modulated signal and the fixed level signal output from the signal encoder into the data signal and the clock signal.
    Type: Application
    Filed: September 11, 2007
    Publication date: December 25, 2008
    Applicant: MACROBLOCK, INC.
    Inventors: Chi-Chang HUNG, Yung-Sheng WEI, Meng-Hsiu WEI
  • Publication number: 20080304484
    Abstract: The present invention provides method for operating a multipoint control system. It utilizes start packets pass through every one of controlled units which could be modified and transmitted to the next stage to achieve addressing for all of the system.
    Type: Application
    Filed: June 6, 2008
    Publication date: December 11, 2008
    Applicant: Macroblock, Inc.
    Inventors: MENG-HSIU WEI, Hsien-Jen Chang, Chi-Chang Hung, Yung-Sheng Wei