Patents by Inventor Yung Wei
Yung Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240176094Abstract: An optical system is provided, including a first module configured to hold a first optical member. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the fixed portion.Type: ApplicationFiled: November 28, 2023Publication date: May 30, 2024Inventors: Chia-Che WU, Chao-Chang HU, Yung-Hsien YEH, Chih-Wei WENG, Chih-Wen CHIANG, Yu-Chiao LO, Sin-Jhong SONG
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Publication number: 20240178015Abstract: A manufacturing method of a semiconductor package includes the following steps. A semiconductor device is picked up from a carrier by a pick and place device, wherein the pick and place device includes a flexible head having a bonding portion configured to be in contact with the semiconductor device, a neck portion connecting the bonding portion, wherein a minimum width of the neck portion is substantially smaller than a maximum width of the bonding portion. The semiconductor device is placed and pressed onto a substrate by the pick and place device. An encapsulating material is formed over the substrate to laterally encapsulating the semiconductor device. A redistribution structure is formed over the semiconductor device and the encapsulating material. The substrate is removed.Type: ApplicationFiled: February 7, 2023Publication date: May 30, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Wei Wu, Hsien-Ju Tsou, Yung-Chi Lin, Tsang-Jiuh Wu
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Publication number: 20240176093Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: ApplicationFiled: February 5, 2024Publication date: May 30, 2024Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
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Publication number: 20240176335Abstract: A fault detection method, includes the following steps. A target sequence is received, the target sequence includes several data. A first moving average operation is performed on the target sequence to establish a first moving average sequence. A second moving average operation is performed on the target sequence to establish a second moving average sequence. A difference operation between the first moving average sequence and the second moving average sequence is performed to obtain a difference sequence, the difference sequence includes several difference values. An upper limit value is set. When one of the difference values is greater than the upper limit value, the target sequence is determines as abnormal.Type: ApplicationFiled: February 6, 2024Publication date: May 30, 2024Inventors: Yung-Yu Yang, Kang-Ping Li, Chih-Kuan Chang, Chung-Chih Hung, Chen-Hui Huang, Nai-Ying Lo, Shih-Wei Huang
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Publication number: 20240176159Abstract: An optical system that includes a first module is provided. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the first fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the first fixed portion.Type: ApplicationFiled: November 28, 2023Publication date: May 30, 2024Inventors: Chia-Che WU, Chao-Chang HU, Yung-Hsien YEH, Chih-Wei WENG, Chih-Wen CHIANG, Yu-Chiao LO, Sin-Jhong SONG
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Publication number: 20240170397Abstract: A semiconductor structure includes a first dielectric layer over a first conductive line and a second conductive line, a high resistance layer over a portion of the first dielectric layer, a low-k dielectric layer over the second dielectric layer, a second dielectric layer on the high resistance layer, a first conductive via extending through the low-k dielectric layer and the second dielectric layer, and a second conductive via extending through the low-k dielectric layer and the first dielectric layer to the first conductive line. The first conductive via extends into the high resistance layer.Type: ApplicationFiled: January 24, 2024Publication date: May 23, 2024Inventors: Hong-Wei Chan, Yung-Shih Chen, Wen-Sheh Huang, Yu-Hsiang Cheng
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Patent number: 11990522Abstract: A semiconductor structure includes a substrate and a semiconductor channel layer over the substrate. The semiconductor structure includes a high-k gate dielectric layer over the semiconductor channel layer, a work function metal layer over the high-k gate dielectric layer, and a bulk metal layer over the work function metal layer. The work function metal layer includes a first portion and a second portion over the first portion. Both the first portion and the second portion are conductive. Materials included in the second portion are also included in the first portion. The first portion is doped with silicon at a first dopant concentration, and the second portion is not doped with silicon or is doped with silicon at a second dopant concentration lower than the first dopant concentration.Type: GrantFiled: December 9, 2022Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen-Tien Tung, Szu-Wei Huang, Zhi-Ren Xiao, Yin-Chuan Chuang, Yung-Chien Huang, Kuan-Ting Liu, Tzer-Min Shen, Chung-Wei Wu, Zhiqiang Wu
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Patent number: 11991767Abstract: A Bluetooth communication system includes: a Bluetooth host device; and a Bluetooth device set which including a first member device and a second member device. The first member device is arranged to operably transmit a corresponding first device information to the Bluetooth host device. The second member device is arranged to operably transmit a corresponding second device information to the Bluetooth host device. The Bluetooth host device is arranged to operably control a display device to simultaneously display a first device item for representing the first member device and a second device item for representing the second member device in a graphical user interface. The Bluetooth host device is further arranged to operably establish a Bluetooth connection with the first member device and conduct pairing procedure with the first member device after receiving a selection command corresponding to the first member device.Type: GrantFiled: February 9, 2022Date of Patent: May 21, 2024Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Qing Gu, Bi Wei, Yu Hsuan Liu, Yung Chieh Lin, Cheng Cai, Sixian Wang
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Publication number: 20240157412Abstract: The present disclosure relates to an apparatus and a method for wafer cleaning. The apparatus can include a wafer holder configured to hold a wafer; a cleaning nozzle configured to dispense a cleaning fluid onto a first surface (e.g., front surface) of the wafer; and a cleaning brush configured to clean a second surface (e.g., back surface) of the wafer. Using the cleaning fluid, the cleaning brush can clean the second surface of the wafer with a scrubbing motion and ultrasonic vibration.Type: ApplicationFiled: January 26, 2024Publication date: May 16, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Bo Chen CHEN, Sheng-Wei Wu, Yung-Li Tsai
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Publication number: 20240162038Abstract: A photomask structure including a first layout pattern and a second layout pattern is provided. The second layout pattern is located on one side of the first layout pattern. The first layout pattern and the second layout pattern are separated from each other. The first layout pattern has a first edge and a second edge opposite to each other. The second layout pattern has a third edge and a fourth edge opposite to each other. The third edge of the second layout pattern is adjacent to the first edge of the first layout pattern. The second layout pattern includes a first extension portion exceeding an end of the first layout pattern. The first extension portion includes a first protruding portion protruding from the third edge of the second layout pattern. The first protruding portion exceeds the first edge of the first layout pattern.Type: ApplicationFiled: February 10, 2023Publication date: May 16, 2024Applicant: United Microelectronics Corp.Inventors: Chien Heng Liu, Chia-Wei Huang, Yung-Feng Cheng, Ming-Jui Chen
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Patent number: 11983680Abstract: An intelligent monitoring system for waste disposal and the method thereof are provided, which include a plurality of operational devices and stages. First, a transportation stage is performed to loading a transport vehicle with a waste so as to transport the waste to a disposal station for further treatment. A camera and a sensor for detecting abnormal conditions are installed any one of the operational devices or installed in the operational path of any one of the operational devices. The camera records the videos of the operational stages, captures the images from the videos and recognizes the images in order to determine whether the abnormal conditions occur in any one of the operational stages. Alternatively, the camera is triggered to capture the images and recognize the images after the abnormal conditions are detected by the sensor in order to determine whether the abnormal conditions actually occur.Type: GrantFiled: June 12, 2021Date of Patent: May 14, 2024Assignee: CHASE SUSTAINABILITY TECHNOLOGY CO., LTD.Inventors: Yung-Fa Yang, Tsung-Tien Chen, Shao-Hsin Hsu, Bo-Wei Chen, Chia-Ching Chen, Ming-Hua Tang
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Patent number: 11978768Abstract: A method manufacturing of a semiconductor structure including following steps is provided. A material layer is provided. A first mask layer is formed on the material layer. Core patterns are formed on the first mask layer. A spacer material layer is conformally formed on the core patterns. An etch-back process is performed on the spacer material layer. A portion of the spacer material layer located on two ends of the core pattern is removed, then spacer structures are formed. Each spacer structure includes a merged spacer and a non-merged spacer. The core patterns are removed. The first patterned mask layer is formed to cover a portion of the merged spacer and expose another portion of the merged spacer and the non-merged spacer. The first patterned mask layer and the spacer structure are used as a mask, and the first mask layer is patterned into a second patterned mask layer.Type: GrantFiled: June 8, 2023Date of Patent: May 7, 2024Assignee: Winbond Electronics Corp.Inventors: Tseng-Yao Pan, Chien-Hsiang Yu, Ching-Yung Wang, Cheng-Hong Wei, Ming-Tsang Wang
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Patent number: 11978511Abstract: A phase-change memory (PCM) cell is provided to include a first electrode, a second electrode, and a phase-change feature disposed between the first electrode and the second electrode. The phase-change feature is configured to change its data state based on a write operation performed on the PCM cell. The write operation includes a reset stage and a set stage. In the reset stage, a plurality of reset current pulses are applied to the PCM cell, and the reset current pulses have increasing current amplitudes. In the set stage, a plurality of set current pulses are applied to the PCM cell, and the set current pulses exhibit an increasing trend in current amplitude. The current amplitudes of the set current pulses are smaller than those of the reset current pulses.Type: GrantFiled: January 21, 2022Date of Patent: May 7, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yung-Huei Lee, Chun-Wei Chang, Jian-Hong Lin, Wen-Hsien Kuo, Pei-Chun Liao, Chih-Hung Nien
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Publication number: 20240145430Abstract: In an embodiment, a method includes performing a first plasma deposition to form a buffer layer over a first side of a first integrated circuit device, the first integrated circuit device comprising a first substrate and a first interconnect structure; performing a second plasma deposition to form a first bonding layer over the buffer layer, wherein a plasma power applied during the second plasma deposition is greater than a plasma power applied during the first plasma deposition; planarizing the first bonding layer; forming a second bonding layer over a second substrate; pressing the second bonding layer onto the first bonding layer; and removing the first sType: ApplicationFiled: January 11, 2024Publication date: May 2, 2024Inventors: Yao-Te Huang, Hong-Wei Chan, Yung-Shih Cheng
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Publication number: 20240145911Abstract: An antenna correcting system is provided. The antenna correction system compares amplitudes of antenna signals that are emitted or received respectively by a plurality of antenna units with each other to select one of the amplitudes as target amplitude. The antenna correction system corrects the amplitude of each of the antenna signals according to the target amplitude. As a result, the amplitudes of the antenna signals are the same as each other or approximate to each other. After the amplitudes of the antenna signals are corrected, the antenna correction system compares phases of the antenna signals with each other to select one of the phases as a target phase. The antenna correction system corrects the phase of each of the antenna signals according to the target phase. As a result, the phases of the antenna signals are the same as each other or approximate to each other.Type: ApplicationFiled: November 17, 2022Publication date: May 2, 2024Inventors: YUNG-TAI HSU, CHUN-HENG CHAO, YEN-WEI WANG, BO-YU ZHU
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Publication number: 20240126327Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.Type: ApplicationFiled: October 14, 2022Publication date: April 18, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chao Wei LIU, Wei-Hao CHANG, Yung-I YEH, Jen-Chieh KAO, Tun-Ching PI, Ming-Hung CHEN, Hui-Ping JIAN, Shang-Lin WU
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Patent number: 11962426Abstract: An Ethernet power supply receives a DC voltage through a bus positive terminal and a bus negative terminal, and is coupled to a load device. The Ethernet power supply includes a first control module and a second control module. The first control module is used to provide a first control signal through the bus negative terminal to confirm whether the load device is a valid load. The second control module is used to connect or disconnect a coupling relationship between the bus positive terminal and the first control module according to the load device being connected or not.Type: GrantFiled: May 25, 2022Date of Patent: April 16, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Yung-Wei Peng, Kuan-Hsien Tu, Cheng-En Liu
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Patent number: 11958090Abstract: The present disclosure relates to an apparatus and a method for wafer cleaning. The apparatus can include a wafer holder configured to hold a wafer; a cleaning nozzle configured to dispense a cleaning fluid onto a first surface (e.g., front surface) of the wafer; and a cleaning brush configured to clean a second surface (e.g., back surface) of the wafer. Using the cleaning fluid, the cleaning brush can clean the second surface of the wafer with a scrubbing motion and ultrasonic vibration.Type: GrantFiled: July 28, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Bo Chen Chen, Sheng-Wei Wu, Yung-Li Tsai
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Patent number: 11953964Abstract: An Ethernet power supply receives a DC voltage through a bus positive terminal and a bus negative terminal, and is coupled to a load device. The Ethernet power supply includes a first control module and a second control module. The first control module provides a first control signal through the bus negative terminal to confirm whether the load device is a valid load. The second control module is used to connect or disconnect a coupling relationship between the bus positive terminal and the first control module according to whether the load device is connected to the Ethernet power supply.Type: GrantFiled: June 2, 2022Date of Patent: April 9, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Yung-Wei Peng, Kuan-Hsien Tu, Cheng-En Liu
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Patent number: 11955522Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a buffer layer, a barrier layer, a dielectric layer, a source structure, and a drain structure. The buffer layer is disposed on the substrate. The barrier layer is disposed on the buffer layer. The dielectric layer is disposed on the barrier layer. The passivation layer is disposed on the dielectric layer. The source structure and the drain structure are disposed on the passivation layer.Type: GrantFiled: February 13, 2020Date of Patent: April 9, 2024Assignee: Vanguard International Semiconductor CorporationInventors: Cheng-Wei Chou, Shin-Cheng Lin, Yung-Fong Lin