Patents by Inventor Yunging Liu

Yunging Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151306
    Abstract: A semiconductor device and method for fabricating a semiconductor device includes etch selectivity tuning to enlarge epitaxy process windows. Through modification of etching processes and careful selection of materials, improvements in semiconductor device yield and performance can be delivered. Etch selectivity is controlled by using dilute gas, using assistive etch chemicals, controlling a magnitude of bias power used in the etching process, and controlling an amount of passivation gas used in the etching process, among other approaches. A recess is formed in a dummy fin in a region of the semiconductor where epitaxial growth occurs to further enlarge the epitaxy process window.
    Type: Application
    Filed: January 10, 2025
    Publication date: May 8, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Shih-Yao Lin, Te-Yung Liu, Chih-Han Lin
  • Publication number: 20250068150
    Abstract: A smart factory system for being set up between a smart factory and a backend-system provider is disclosed. The smart factory system includes: a factory installation, being installed in the smart factory; a plurality of sensors, being in connection with the factory installation; a smart machine box, being signally connected to each of the sensors; a computing and storing apparatus, being set up at premises of the backend-system provider; and a query-making apparatus. With the most cost-intensive functions like computing and storing set up and maintained by the backend-system provider, a smart factory can be easily started and run by locally setting up and maintaining sensors and smart machine boxes while remotely subscribing the functions maintained by the backend-system provider as services with payment. The system significantly reduces the costs for stating and running a smart factory, thereby encouraging transformation into or establishment of smart factories.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 27, 2025
    Inventors: Chih-Neng LIU, Chih-Yung LIU
  • Publication number: 20250048678
    Abstract: A semiconductor device includes plurality of fin structures extending in first direction on semiconductor substrate. Fin structure's lower portion is embedded in first insulating layer. First gate electrode and second gate electrode structures extend in second direction substantially perpendicular to first direction over of fin structures and first insulating layer. The first and second gate electrode structures are spaced apart and extend along line in same direction. First and second insulating sidewall spacers are arranged on opposing sides of first and second gate electrode structures. Each of first and second insulating sidewall spacers contiguously extend along second direction. A second insulating layer is in region between first and second gate electrode structures. The second insulating layer separates first and second gate electrode structures. A third insulating layer is in region between first and second gate electrode structures.
    Type: Application
    Filed: October 21, 2024
    Publication date: February 6, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Han LIN, Shih-Chang TSAI, Wen-Shuo HSIEH, Te-Yung LIU
  • Patent number: 12211927
    Abstract: A semiconductor device and method for fabricating a semiconductor device includes etch selectivity tuning to enlarge epitaxy process windows. Through modification of etching processes and careful selection of materials, improvements in semiconductor device yield and performance can be delivered. Etch selectivity is controlled by using dilute gas, using assistive etch chemicals, controlling a magnitude of bias power used in the etching process, and controlling an amount of passivation gas used in the etching process, among other approaches. A recess is formed in a dummy fin in a region of the semiconductor where epitaxial growth occurs to further enlarge the epitaxy process window.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yao Lin, Te-Yung Liu, Chih-Han Lin
  • Patent number: 12189171
    Abstract: A display apparatus including a display panel, a first light source module, and a second light source module is disclosed. The display panel has a display surface and a back surface away from the display surface. The first light source module is disposed on a side of one of the display surface and the back surface of the display panel, and overlaps the display surface. The second light source module is disposed on a side of the other one of the display surface and the back surface of the display panel, and overlaps the display surface.
    Type: Grant
    Filed: November 26, 2023
    Date of Patent: January 7, 2025
    Assignee: HannStar Display Corporation
    Inventors: Chen-Hao Su, Chin-Wei Lin, Chin-Yung Liu
  • Publication number: 20240428707
    Abstract: The present invention provides an acupuncture point simulation device and a method of using the same in an education training and evaluation examination system. The method comprises the steps of: at least one pressure sensor being electrically connected to a message transceiver module; the module being electrically connected to a first and second message transceiver units; the second unit providing an acupuncture point message to the first unit; a user applying a force to the outer layer of the pressure sensor corresponding to the message, the sensor transmitting a message to the module which sends the message or other message converted by the message; the first unit receiving the message and outputting a first message; and the second unit receiving the first message, performing calculation and comparison, and outputting a second message to the first unit for user identification or reference.
    Type: Application
    Filed: June 18, 2024
    Publication date: December 26, 2024
    Inventors: Sung Yen HUANG, Po Te LIN, Sheng Fei CHUANG, Ting Che CHEN, Sen Yung LIU, Chih Ming LIN, Ming Chih YANG, Jia Ming CHEN, Ya Lun LI
  • Patent number: 12154962
    Abstract: A semiconductor device includes plurality of fin structures extending in first direction on semiconductor substrate. Fin structure's lower portion is embedded in first insulating layer. First gate electrode and second gate electrode structures extend in second direction substantially perpendicular to first direction over of fin structures and first insulating layer. The first and second gate electrode structures are spaced apart and extend along line in same direction. First and second insulating sidewall spacers are arranged on opposing sides of first and second gate electrode structures. Each of first and second insulating sidewall spacers contiguously extend along second direction. A second insulating layer is in region between first and second gate electrode structures. The second insulating layer separates first and second gate electrode structures. A third insulating layer is in region between first and second gate electrode structures.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: November 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Han Lin, Shih-Chang Tsai, Wen-Shuo Hsieh, Te-Yung Liu
  • Publication number: 20240353611
    Abstract: A display apparatus including a display panel, a first light source module, and a second light source module is disclosed. The display panel has a display surface and a back surface away from the display surface. The first light source module is disposed on a side of one of the display surface and the back surface of the display panel, and overlaps the display surface. The second light source module is disposed on a side of the other one of the display surface and the back surface of the display panel, and overlaps the display surface.
    Type: Application
    Filed: November 26, 2023
    Publication date: October 24, 2024
    Applicant: HannStar Display Corporation
    Inventors: Chen-Hao Su, Chin-Wei Lin, Chin-Yung Liu
  • Publication number: 20240186186
    Abstract: A method includes forming a first protruding semiconductor fin and a dummy fin protruding higher than top surfaces of isolation regions. The first protruding semiconductor fin is parallel to the dummy fin, forming a gate stack on a first portion of the first protruding semiconductor fin and a second portion of the dummy fin. The method further includes recessing a third portion of the first protruding semiconductor fin to form a recess, recessing an fourth portion of the dummy fin to reduce a height of the fourth portion of the dummy fin, and forming an epitaxy semiconductor region in the recess. The epitaxy semiconductor region is grown toward the dummy fin.
    Type: Application
    Filed: January 2, 2024
    Publication date: June 6, 2024
    Inventors: Shih-Yao Lin, Te-Yung Liu, Chih-Han Lin
  • Patent number: 11894274
    Abstract: A method includes forming a first protruding semiconductor fin and a dummy fin protruding higher than top surfaces of isolation regions. The first protruding semiconductor fin is parallel to the dummy fin, forming a gate stack on a first portion of the first protruding semiconductor fin and a second portion of the dummy fin. The method further includes recessing a third portion of the first protruding semiconductor fin to form a recess, recessing an fourth portion of the dummy fin to reduce a height of the fourth portion of the dummy fin, and forming an epitaxy semiconductor region in the recess. The epitaxy semiconductor region is grown toward the dummy fin.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Yao Lin, Te-Yung Liu, Chih-Han Lin
  • Publication number: 20230378307
    Abstract: A semiconductor device includes plurality of fin structures extending in first direction on semiconductor substrate. Fin structure's lower portion is embedded in first insulating layer. First gate electrode and second gate electrode structures extend in second direction substantially perpendicular to first direction over of fin structures and first insulating layer. The first and second gate electrode structures are spaced apart and extend along line in same direction. First and second insulating sidewall spacers are arranged on opposing sides of first and second gate electrode structures. Each of first and second insulating sidewall spacers contiguously extend along second direction. A second insulating layer is in region between first and second gate electrode structures. The second insulating layer separates first and second gate electrode structures. A third insulating layer is in region between first and second gate electrode structures.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 23, 2023
    Inventors: Chih-Han Lin, Shih-Chang TSAI, Wen-Shuo HSIEH, Te-Yung LIU
  • Publication number: 20230369470
    Abstract: A semiconductor device and method for fabricating a semiconductor device includes etch selectivity tuning to enlarge epitaxy process windows. Through modification of etching processes and careful selection of materials, improvements in semiconductor device yield and performance can be delivered. Etch selectivity is controlled by using dilute gas, using assistive etch chemicals, controlling a magnitude of bias power used in the etching process, and controlling an amount of passivation gas used in the etching process, among other approaches. A recess is formed in a dummy fin in a region of the semiconductor where epitaxial growth occurs to further enlarge the epitaxy process window.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Shih-Yao Lin, Te-Yung Liu, Chih-Han Lin
  • Patent number: 11804534
    Abstract: A semiconductor device includes plurality of fin structures extending in first direction on semiconductor substrate. Fin structure's lower portion is embedded in first insulating layer. First gate electrode and second gate electrode structures extend in second direction substantially perpendicular to first direction over of fin structures and first insulating layer. The first and second gate electrode structures are spaced apart and extend along line in same direction. First and second insulating sidewall spacers are arranged on opposing sides of first and second gate electrode structures. Each of first and second insulating sidewall spacers contiguously extend along second direction. A second insulating layer is in region between first and second gate electrode structures. The second insulating layer separates first and second gate electrode structures. A third insulating layer is in region between first and second gate electrode structures.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: October 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Han Lin, Shih-Chang Tsai, Wen-Shuo Hsieh, Te-Yung Liu
  • Patent number: 11785959
    Abstract: Disclosed is a fast chilling method for improving beef tenderness, including the following steps: step 1, sample pretreatment: taking beef longissimus dorsi muscle after slaughter, removing surface fat and connective tissue, and vacuum packaging; step 2, rapid chilling: rapidly transferring the pre-treated sample completed in step 1 to a chilling equipment for chilling to a sample temperature of ?3 degrees Celsius (° C.), where the chilling is completed within 5 hours (h) after slaughter; step 3, chilling and aging at super-chilled temperature: transferring the samples rapidly chilled in step 2 to a chilled warehouse, and continuing to chilling and aging until 24 h after slaughter; and step 4, chilling storage and aging: cutting the sample equally into 2.5 centimeters (cm) thickness 24 h after slaughter, and then completing a vacuum skin packaging and refrigerating for aging.
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: October 17, 2023
    Assignee: SHANDONG AGRICULTURAL UNIVERSITY
    Inventors: Yimin Zhang, Xin Luo, Yanwei Mao, Rongrong Liang, Pengcheng Dong, Xiaoyin Yang, Yunge Liu, Xue Chen
  • Patent number: 11786485
    Abstract: The present invention provides methods and compositions for treating advanced stage non-small cell lung cancer by cyclohexenone compounds.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: October 17, 2023
    Assignee: Golden Biotechnology Corporation
    Inventors: Sheng-Yung Liu, Chih-Ming Chen, Pei-Ni Chen, Hao-Yu Cheng
  • Publication number: 20230292775
    Abstract: Disclosed is a fast chilling method for improving beef tenderness, including the following steps: step 1, sample pretreatment: taking beef longissimus dorsi muscle after slaughter, removing surface fat and connective tissue, and vacuum packaging; step 2, rapid chilling: rapidly transferring the pre-treated sample completed in step 1 to a chilling equipment for chilling to a sample temperature of ?3 degrees Celsius (° C.), where the chilling is completed within 5 hours (h) after slaughter; step 3, chilling and aging at super-chilled temperature: transferring the samples rapidly chilled in step 2 to a chilled warehouse, and continuing to chilling and aging until 24 h after slaughter; and step 4, chilling storage and aging: cutting the sample equally into 2.5 centimeters (cm) thickness 24 h after slaughter, and then completing a vacuum skin packaging and refrigerating for aging.
    Type: Application
    Filed: March 14, 2023
    Publication date: September 21, 2023
    Inventors: Yimin ZHANG, Xin LUO, Yanwei MAO, Rongrong LIANG, Pengcheng DONG, Xiaoyin YANG, Yunge LIU, Xue CHEN
  • Publication number: 20230284967
    Abstract: A nasogastric tube contains: a body, a plug, and a pH (potential of hydrogen) sensor. The body includes a feeding portion, a discharging portion, and a conduit. The feeding portion has a cap, and the discharging portion has multiple through orifices. The plug includes a connecting portion and a protruded portion. The protruded portion has a smooth surface. The pH sensor is injection molded to integrate into the plug, and the pH sensor includes a pH sensing element and two antennas. The pH sensing element is made of conducting material which is configured to produce different voltage response with a pH ion concentration in gastric juice. The pH value of the gastric juice measured by the pH sensing element is wirelessly send by the two antennas to a reader, and the pH value of the gastric juice measured is displayed on the reader.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 14, 2023
    Inventor: Sen-Yung Liu
  • Patent number: 11757024
    Abstract: A semiconductor device and method for fabricating a semiconductor device includes etch selectivity tuning to enlarge epitaxy process windows. Through modification of etching processes and careful selection of materials, improvements in semiconductor device yield and performance can be delivered. Etch selectivity is controlled by using dilute gas, using assistive etch chemicals, controlling a magnitude of bias power used in the etching process, and controlling an amount of passivation gas used in the etching process, among other approaches. A recess is formed in a dummy fin in a region of the semiconductor where epitaxial growth occurs to further enlarge the epitaxy process window.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shih-Yao Lin, Te-Yung Liu, Chih-Han Lin
  • Publication number: 20230190680
    Abstract: The present invention provides methods and compositions for treating or reducing the symptoms of or preventing an RNA virus induced disease in a subject by cyclohexenone compounds.
    Type: Application
    Filed: May 7, 2021
    Publication date: June 22, 2023
    Inventors: Sheng-Yung Liu, Ching-Tien Su, Wu-Che Wen, Pei-Ni Chen
  • Publication number: 20230166657
    Abstract: A radar reflective vehicle breakdown warning sign comprises primarily a body and a projecting lamp, and a remote control for connecting to the body and the projecting lamp. In an interior of the body is disposed a control circuit and a transmission component connected to the control circuit. The transmission component is pivotally connected to a vehicle breakdown warning sign. On the vehicle breakdown warning sign are disposed radar wave reflecting patches which may reflect the radar waves emitted by a vehicle with an autonomous driving function. In an interior of the projecting lamp is disposed a control circuit and a light emitting component connected to the control circuit.
    Type: Application
    Filed: November 26, 2021
    Publication date: June 1, 2023
    Inventors: YAO-LIN LIU, Shih-Yung Liu, Chen-Yi Liu