Patents by Inventor Yunhai Wan
Yunhai Wan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12366781Abstract: An array substrate includes sub-pixels arranged in an array, scan lines, and data lines on a base substrate, with any one of the sub-pixels including a pixel electrode and a switch transistor; wherein the pixel electrode is connected to a drain electrode of the switch transistor, a gate electrode of the switch transistor is connected to one of the scan lines, a source electrode of the switch transistor is connected to one of the data lines; and an active layer of the switch transistor of the sub-pixel is located between the pixel electrode of the sub-pixel and the data line connected to the sub-pixel.Type: GrantFiled: August 11, 2021Date of Patent: July 22, 2025Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yunhai Wan, Zhixiang Zou, Chuan Chen, Xuehai Gui, Peihua Sun
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Publication number: 20230134406Abstract: An array substrate includes sub-pixels arranged in an array, scan lines, and data lines on a base substrate, with any one of the sub-pixels including a pixel electrode and a switch transistor; wherein the pixel electrode is connected to a drain electrode of the switch transistor, a gate electrode of the switch transistor is connected to one of the scan lines, a source electrode of the switch transistor is connected to one of the data lines; and an active layer of the switch transistor of the sub-pixel is located between the pixel electrode of the sub-pixel and the data line connected to the sub-pixel.Type: ApplicationFiled: August 11, 2021Publication date: May 4, 2023Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yunhai WAN, Zhixiang ZOU, Chuan CHEN, Xuehai GUI, Peihua SUN
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Patent number: 11307469Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate, a display device. An array substrate comprises: a pixel array, each pixel in the pixel array having a pixel electrode; a transistor array, each transistor in the transistor array having a source electrode; and a connection electrode for electrically connecting the pixel electrode to a corresponding source electrode.Type: GrantFiled: October 20, 2017Date of Patent: April 19, 2022Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Tao Jiang, Yunhai Wan, Binbin Cao, Xianghua Ren
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Patent number: 11177334Abstract: A display substrate, display panel, and method of fabricating the display substrate. The display substrate includes: a first thin film transistor on a substrate; a second thin film transistor on the substrate and on the same side of the substrate as first thin film transistor; a light blocking structure between the substrate and an active region of first thin film transistor. The light blocking structure is configured to block at least a portion of light incident on the active region of first thin film transistor, such that a ratio of area of an illuminated portion of the active region of first thin film transistor to an area of the active region of first thin film transistor is less than a ratio of area of an illuminated portion of an active region of second thin film transistor to an area of the active region of second thin film transistor.Type: GrantFiled: October 10, 2019Date of Patent: November 16, 2021Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Liang Lin, Yunhai Wan, Zhixiang Zou, Chuan Chen, Wei He
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Patent number: 10923597Abstract: A transistor and a method for manufacturing the same, a display substrate, and a display apparatus are provided. The transistor may include: a substrate; an active region on the substrate and including a polycrystalline silicon region; an etch stop layer at a side of the polycrystalline silicon region distal to the substrate; and a first heavily doped amorphous silicon region and a second heavily doped amorphous silicon region both at a side of the etch stop layer distal to the substrate; the polycrystalline silicon region having a first side surface corresponding to the first heavily doped amorphous silicon region and a second side surface corresponding to the second heavily doped amorphous silicon region; wherein an orthographic projection of the polycrystalline silicon region on a plane in which a lower surface of the etch stop layer lies does not go beyond the lower surface of the etch stop layer.Type: GrantFiled: May 31, 2019Date of Patent: February 16, 2021Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Haijiao Qian, Chengshao Yang, Yinhu Huang, Yunhai Wan
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Patent number: 10872807Abstract: A manufacturing method of a via hole, a display substrate and a manufacturing method thereof are provided. The manufacturing method of a via hole includes: forming a first via hole penetrating the passivation protection layer, the first via hole being defined by a first side wall of the passivation protection layer; forming an organic insulating layer on the passivation protection layer; and forming a second via hole penetrating the organic insulating layer, the second via hole being defined by a second side wall of the organic insulating layer; wherein in a sectional view, a bottom of the second via hole is located in the first via hole and is in direct contact with the conductive layer, and the second side wall of the organic insulating layer is separated from the first side wall of the passivation protection layer.Type: GrantFiled: March 22, 2018Date of Patent: December 22, 2020Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yunhai Wan, Chengshao Yang, Wenlong Wang, Ke Cao
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Publication number: 20200273888Abstract: A display substrate, display panel, and method of fabricating the display substrate. The display substrate includes: a first thin film transistor on a substrate; a second thin film transistor on the substrate and on the same side of the substrate as first thin film transistor; a light blocking structure between the substrate and an active region of first thin film transistor. The light blocking structure is configured to block at least a portion of light incident on the active region of first thin film transistor, such that a ratio of area of an illuminated portion of the active region of first thin film transistor to an area of the active region of first thin film transistor is less than a ratio of area of an illuminated portion of an active region of second thin film transistor to an area of the active region of second thin film transistor.Type: ApplicationFiled: October 10, 2019Publication date: August 27, 2020Inventors: Liang LIN, Yunhai WAN, Zhixiang ZOU, Chuan CHEN, Wei HE
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Publication number: 20200225546Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate, a display device. An array substrate comprises: a pixel array, each pixel in the pixel array having a pixel electrode; a transistor array, each transistor in the transistor array having a source electrode; and a connection electrode for electrically connecting the pixel electrode to a corresponding source electrode.Type: ApplicationFiled: October 20, 2017Publication date: July 16, 2020Inventors: Tao JIANG, Yunhai WAN, Binbin CAO, Xianghua REN
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Publication number: 20200135931Abstract: A transistor and a method for manufacturing the same, a display substrate, and a display apparatus are provided. The transistor may include: a substrate; an active region on the substrate and including a polycrystalline silicon region; an etch stop layer at a side of the polycrystalline silicon region distal to the substrate; and a first heavily doped amorphous silicon region and a second heavily doped amorphous silicon region both at a side of the etch stop layer distal to the substrate; the polycrystalline silicon region having a first side surface corresponding to the first heavily doped amorphous silicon region and a second side surface corresponding to the second heavily doped amorphous silicon region; wherein an orthographic projection of the polycrystalline silicon region on a plane in which a lower surface of the etch stop layer lies does not go beyond the lower surface of the etch stop layer.Type: ApplicationFiled: May 31, 2019Publication date: April 30, 2020Inventors: Haijiao QIAN, Chengshao YANG, Yinhu HUANG, Yunhai WAN
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Patent number: 10546882Abstract: The present disclosure provides an array substrate, a display panel comprising the array substrate, and a display device, as well as a manufacturing method of the array substrate. The array substrate comprises a base substrate, a metal layer arranged over the base substrate, a conductive material layer arranged on the metal layer, and a connection hole arranged over the conductive material layer to expose the conductive material layer.Type: GrantFiled: January 5, 2017Date of Patent: January 28, 2020Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Botao Song, Chengshao Yang, Yinhu Huang, Ning Liu, Jun Ma, Yunhai Wan
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Patent number: 10509286Abstract: A manufacturing method of the invention, comprising: successively forming an insulation layer and a photoresist layer on a transparent substrate; performing an exposure and a development on the photoresist layer by a back exposure process, so as to form a trench in the photoresist layer, an open area of the trench proximal to the insulation layer is larger than that of the trench distal to the insulation layer; removing a portion of insulation material in a region of the insulation layer exposed through the trench by an etching process, so as to form a slot in the insulation layer; forming a metal layer on a side of the photoresist layer distal to the insulation layer, a portion of the metal layer is embedded in the slot; removing the photoresist layer and the metal layer thereon by a stripping process, and retaining the portion of the metal layer in the slot.Type: GrantFiled: October 9, 2016Date of Patent: December 17, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Yunhai Wan, Chengshao Yang, Ling Han, Botao Song
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Publication number: 20190311943Abstract: A manufacturing method of a via hole, a display substrate and a manufacturing method thereof are provided. The manufacturing method of a via hole includes: forming a first via hole penetrating the passivation protection layer, the first via hole being defined by a first side wall of the passivation protection layer; forming an organic insulating layer on the passivation protection layer; and forming a second via hole penetrating the organic insulating layer, the second via hole being defined by a second side wall of the organic insulating layer; wherein in a sectional view, a bottom of the second via hole is located in the first via hole and is in direct contact with the conductive layer, and the second side wall of the organic insulating layer is separated from the first side wall of the passivation protection layer.Type: ApplicationFiled: March 22, 2018Publication date: October 10, 2019Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd ., BOE Technology Group Co., Ltd.Inventors: Yunhai WAN, Chengshao YANG, Wenlong WANG, Ke CAO
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Patent number: 10332807Abstract: An array substrate and a manufacturing method thereof are provided. The method for manufacturing the array substrate includes: forming a passivation layer on a base substrate; forming photoresist on the passivation layer, and forming a first photoresist pattern including a photoresist-completely-retained region, a photoresist-partially-retained region and a photoresist-completely-removed region, by exposure and development processes; forming a first through hole in the passivation layer by etching the passivation layer with the first photoresist pattern as a mask; forming a second photoresist pattern by performing ashing on the first photoresist pattern to remove the photoresist in the photoresist-partially-retained region and reduce a thickness of the photoresist in the photoresist-completely-retained region; and etching the passivation layer with the second photoresist pattern as a mask, so as to reduce a thickness of the passivation layer in the photoresist-partially-retained region.Type: GrantFiled: March 3, 2017Date of Patent: June 25, 2019Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.Inventors: Yudong Liu, Rongcheng Liu, Yunhai Wan
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Patent number: 10310647Abstract: Embodiments of the present invention discloses a touch-controlled panel and a method of manufacturing the same, and a display device, to reduce the number of masks and production cost. The method of manufacturing a touch-controlled panel includes: forming a first electrode and a second electrode on a substrate through a patterning process, the first electrode and the second electrode being broken at a position where they are overlapped; depositing a layer of an organic film and forming an organic film fully remained region, an organic film partially remained region and an organic film removed region from the organic film through a mask; depositing a conductive layer and coating a photoresist on the conductive layer, and then forming a photoresist fully remained region, a photoresist partially remained region and a photoresist removed region through the mask.Type: GrantFiled: August 10, 2016Date of Patent: June 4, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Yunhai Wan, Wenlong Wang, Tao Ma, Binbin Cao, Chengshao Yang
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Publication number: 20180211888Abstract: An array substrate and a manufacturing method thereof are provided. The method for manufacturing the array substrate includes: forming a passivation layer on a base substrate; forming photoresist on the passivation layer, and forming a first photoresist pattern including a photoresist-completely-retained region, a photoresist-partially-retained region and a photoresist-completely-removed region, by exposure and development processes; forming a first through hole in the passivation layer by etching the passivation layer with the first photoresist pattern as a mask; forming a second photoresist pattern by performing ashing on the first photoresist pattern to remove the photoresist in the photoresist-partially-retained region and reduce a thickness of the photoresist in the photoresist-completely-retained region; and etching the passivation layer with the second photoresist pattern as a mask, so as to reduce a thickness of the passivation layer in the photoresist-partially-retained region.Type: ApplicationFiled: March 3, 2017Publication date: July 26, 2018Applicants: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd .Inventors: Yudong Liu, Rongcheng Liu, Yunhai Wan
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Publication number: 20180197892Abstract: The present disclosure provides an array substrate, a display panel comprising the array substrate, and a display device, as well as a manufacturing method of the array substrate. The array substrate comprises a base substrate, a metal layer arranged over the base substrate, a conductive material layer arranged on the metal layer, and a connection hole arranged over the conductive material layer to expose the conductive material layer.Type: ApplicationFiled: January 5, 2017Publication date: July 12, 2018Applicants: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTDInventors: Botao SONG, Chengshao YANG, Yinhu HUANG, Ning LIU, Jun MA, Yunhai WAN
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Publication number: 20180059456Abstract: A manufacturing method of the invention, comprising: successively forming an insulation layer and a photoresist layer on a transparent substrate; performing an exposure and a development on the photoresist layer by a back exposure process, so as to form a trench in the photoresist layer, an open area of the trench proximal to the insulation layer is larger than that of the trench distal to the insulation layer; removing a portion of insulation material in a region of the insulation layer exposed through the trench by an etching process, so as to form a slot in the insulation layer; forming a metal layer on a side of the photoresist layer distal to the insulation layer, a portion of the metal layer is embedded in the slot; removing the photoresist layer and the metal layer thereon by a stripping process, and retaining the portion of the metal layer in the slot.Type: ApplicationFiled: October 9, 2016Publication date: March 1, 2018Inventors: Yunhai WAN, Chengshao YANG, Ling HAN, Botao SONG
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Publication number: 20170199615Abstract: Embodiments of the present invention discloses a touch-controlled panel and a method of manufacturing the same, and a display device, to reduce the number of masks and production cost. The method of manufacturing a touch-controlled panel includes: forming a first electrode and a second electrode on a substrate through a patterning process, the first electrode and the second electrode being broken at a position where they are overlapped; depositing a layer of an organic film and forming an organic film fully remained region, an organic film partially remained region and an organic film removed region from the organic film through a mask; depositing a conductive layer and coating a photoresist on the conductive layer, and then forming a photoresist fully remained region, a photoresist partially remained region and a photoresist removed region through the mask.Type: ApplicationFiled: August 10, 2016Publication date: July 13, 2017Inventors: Yunhai Wan, Wenlong Wang, Tao Ma, Binbin Cao, Chengshao Yang