Patents by Inventor YUN KYO CHO
YUN KYO CHO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230289601Abstract: An integrated circuit included in a device for performing a neural network operation includes a buffer configured to store feature map data in units of cells each including at least one feature, wherein the feature map data is for use in the neural network operation; and a multiplexing circuit configured to receive the feature map data from the buffer, and output extracted data by extracting feature data of one of features that are included within a plurality of cells in the received feature map data, the features each corresponding to an identical coordinate value.Type: ApplicationFiled: May 17, 2023Publication date: September 14, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Jun-seok PARK, Jin-ook Song, Jae-gon Lee, Yun-kyo Cho
-
Publication number: 20230269157Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: ApplicationFiled: May 2, 2023Publication date: August 24, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Jae Geun YUN, Seong Min JO, Yun Kyo CHO, Byeong Jin KIM, Dong Soo KANG, Nak Hee SEONG
-
Patent number: 11694074Abstract: An integrated circuit included in a device for performing a neural network operation includes a buffer configured to store feature map data in units of cells each including at least one feature, wherein the feature map data is for use in the neural network operation; and a multiplexing circuit configured to receive the feature map data from the buffer, and output extracted data by extracting feature data of one of features that are included within a plurality of cells in the received feature map data, the features each corresponding to an identical coordinate value.Type: GrantFiled: July 15, 2019Date of Patent: July 4, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-seok Park, Jin-ook Song, Jae-gon Lee, Yun-kyo Cho
-
Patent number: 11652718Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: GrantFiled: May 13, 2022Date of Patent: May 16, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae Geun Yun, Seong Min Jo, Yun Kyo Cho, Byeong Jin Kim, Dong Soo Kang, Nak Hee Seong
-
Patent number: 11625606Abstract: A neural processing system includes a first frontend module, a second frontend module, a first backend module, and a second backend module. The first frontend module executes a feature extraction operation using a first feature map and a first weight, and outputs a first operation result and a second operation result. The second frontend module executes the feature extraction operation using a second feature map and a second weight, and outputs a third operation result and a fourth operation result. The first backend module receives an input of the first operation result provided from the first frontend module and the fourth operation result provided from the second frontend module via a second bridge to sum up the first operation result and the fourth operation result.Type: GrantFiled: August 25, 2022Date of Patent: April 11, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jin Ook Song, Jun Seok Park, Yun Kyo Cho
-
Publication number: 20220405593Abstract: A neural processing system includes a first frontend module, a second frontend module, a first backend module, and a second backend module. The first frontend module executes a feature extraction operation using a first feature map and a first weight, and outputs a first operation result and a second operation result. The second frontend module executes the feature extraction operation using a second feature map and a second weight, and outputs a third operation result and a fourth operation result. The first backend module receives an input of the first operation result provided from the first frontend module and the fourth operation result provided from the second frontend module via a second bridge to sum up the first operation result and the fourth operation result.Type: ApplicationFiled: August 25, 2022Publication date: December 22, 2022Inventors: JIN OOK SONG, JUN SEOK PARK, YUN KYO CHO
-
Patent number: 11443183Abstract: A neural processing system includes a first frontend module, a second frontend module, a first backend module, and a second backend module. The first frontend module executes a feature extraction operation using a first feature map and a first weight, and outputs a first operation result and a second operation result. The second frontend module executes the feature extraction operation using a second feature map and a second weight, and outputs a third operation result and a fourth operation result. The first backend module receives an input of the first operation result provided from the first frontend module and the fourth operation result provided from the second frontend module via a second bridge to sum up the first operation result and the fourth operation result.Type: GrantFiled: July 10, 2019Date of Patent: September 13, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Jin Ook Song, Jun Seok Park, Yun Kyo Cho
-
Publication number: 20220272013Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: ApplicationFiled: May 13, 2022Publication date: August 25, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Jae Geun YUN, Seong Min JO, Yun Kyo CHO, Byeong Jin KIM, Dong Soo KANG, Nak Hee SEONG
-
Patent number: 11349738Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: GrantFiled: May 28, 2020Date of Patent: May 31, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae Geun Yun, Seong Min Jo, Yun Kyo Cho, Byeong Jin Kim, Dong Soo Kang, Nak Hee Seong
-
Publication number: 20200296020Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: ApplicationFiled: May 28, 2020Publication date: September 17, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jae Geun YUN, Seong Min JO, Yun Kyo CHO, Byeong Jin KIM, Dong Soo KANG, Nak Hee SEONG
-
Patent number: 10680923Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter, determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: GrantFiled: February 8, 2017Date of Patent: June 9, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Jae Geun Yun, Seong Min Jo, Yun Kyo Cho, Byeong Jin Kim, Dong Soo Kang, Nak Hee Seong
-
Publication number: 20200082263Abstract: A neural processing system includes a first frontend module, a second frontend module, a first backend module, and a second backend module. The first frontend module executes a feature extraction operation using a first feature map and a first weight, and outputs a first operation result and a second operation result. The second frontend module executes the feature extraction operation using a second feature map and a second weight, and outputs a third operation result and a fourth operation result. The first backend module receives an input of the first operation result provided from the first frontend module and the fourth operation result provided from the second frontend module via a second bridge to sum up the first operation result and the fourth operation result.Type: ApplicationFiled: July 10, 2019Publication date: March 12, 2020Inventors: JIN OOK SONG, JUN SEOK PARK, YUN KYO CHO
-
Publication number: 20200082253Abstract: An integrated circuit included in a device for performing a neural network operation includes a buffer configured to store feature map data in units of cells each including at least one feature, wherein the feature map data is for use in the neural network operation; and a multiplexing circuit configured to receive the feature map data from the buffer, and output extracted data by extracting feature data of one of features that are included within a plurality of cells in the received feature map data, the features each corresponding to an identical coordinate value.Type: ApplicationFiled: July 15, 2019Publication date: March 12, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jun-seok Park, Jin-ook Song, Jae-gon Lee, Yun-kyo Cho
-
Patent number: 10564855Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.Type: GrantFiled: July 3, 2019Date of Patent: February 18, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Nak Hee Seong, Sang Youn Lee, Seong Min Jo, Yun Kyo Cho, Dong Soo Kang, Byeong Jin Kim, Jae Geun Yun
-
Publication number: 20190324660Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.Type: ApplicationFiled: July 3, 2019Publication date: October 24, 2019Inventors: NAK HEE SEONG, SANG YOUN LEE, SEONG MIN JO, YUN KYO CHO, DONG SOO KANG, BYEONG JIN KIM, JAE GEUN YUN
-
Patent number: 10379749Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.Type: GrantFiled: February 3, 2017Date of Patent: August 13, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Nak Hee Seong, Sang Youn Lee, Seong Min Jo, Yun Kyo Cho, Dong Soo Kang, Byeong Jin Kim, Jae Geun Yun
-
Publication number: 20170237636Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter, determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: ApplicationFiled: February 8, 2017Publication date: August 17, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Jae Geun YUN, Seong Min JO, Yun Kyo CHO, Byeong Jin KIM, Dong Soo KANG, Nak Hee SEONG
-
Publication number: 20170228169Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.Type: ApplicationFiled: February 3, 2017Publication date: August 10, 2017Inventors: NAK HEE SEONG, SANG YOUN LEE, SEONG MIN JO, YUN KYO CHO, DONG SOO KANG, BYEONG JIN KIM, JAE GEUN YUN