Patents by Inventor YunSeong JO

YunSeong JO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240164115
    Abstract: Provided are a semiconductor device including a ferroelectric and an electronic apparatus including the semiconductor device. The semiconductor device includes a semiconductor layer, an electrode apart from the semiconductor layer, and a ferroelectric layer arranged between the semiconductor layer and the electrode. The ferroelectric layer includes a plurality of crystal grains, each of which having a first crystal orientation aligned within an angle range with respect to a first direction and having a second crystal orientation aligned within an angle range with respect to a second direction that is different from the first direction.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jinseong HEO, Minsu SEOL, Yunseong LEE, Dongmin KIM, Sanghyun JO, Dukhyun CHOE
  • Patent number: 11973142
    Abstract: An integrated circuit includes transistors respectively including channel layers in a substrate, source electrodes and drain electrodes respectively contacting both sides of the channel layers, gate electrodes on the channel layers, and ferroelectrics layers between the channel layers and the gate electrodes. Electrical characteristics of the ferroelectrics layers of at least two of the transistors are different. Accordingly, threshold voltages of the transistors are different from each other.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangwook Kim, Yunseong Lee, Sanghyun Jo, Jinseong Heo
  • Publication number: 20240113127
    Abstract: A semiconductor device includes a first transistor including a first channel layer of a first conductivity type, a second transistor provided in parallel with the first transistor and including a second channel layer of a second conductivity type, and a third transistor stacked on the first and second transistors. The third transistor may include a gate insulating film including a ferroelectric material. The third transistor may include third channel layer and a gate electrode that are spaced apart from each other in a thickness direction with the gate insulating film therebetween.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sangwook KIM, Jinseong HEO, Yunseong LEE, Sanghyun JO
  • Publication number: 20240088256
    Abstract: An electronic device includes a seed layer including a two-dimensional (2D) material, and a ferroelectric layer on the seed layer. The ferroelectric layer is configured to be aligned in a direction in which a (111) crystal direction is perpendicular to a top surface of a substrate on which the seed layer is located and/or a top surface of the seed layer.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jinseong HEO, Yunseong LEE, Taehwan MOON, Sanghyun JO
  • Publication number: 20240072151
    Abstract: Provided is a semiconductor device including a substrate on which a channel layer is provided, an insulation layer provided on the substrate, a ferroelectric layer provided on the insulation layer, a fixed charge region provided in the ferroelectric layer and containing charges of a predetermined polarity, and a gate provided on the ferroelectric layer. An absolute value of a charge density in the fixed charge region is greater than 0 and less than 5 ?C/cm2.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dukhyun CHOE, Jinseong HEO, Yunseong LEE, Sanghyun JO
  • Publication number: 20230073629
    Abstract: According to an aspect, a data inversion circuit configured to perform DBI-DC encoding using a PAM 4 signal may comprise a data generation unit configured to generate input data based on the PAM 4 signal and a data transmission unit comprising, an auxiliary signal generation unit configured to generate an auxiliary signal that determines whether to perform encoding on the input data by analyzing a plurality of data symbols included in the input data, a channel comprising a plurality of data lines and a data encoding unit configured to generate encoded data by performing DBI (data bus inversion) encoding on the data based on the auxiliary signal and to transmit the generated encoded data to a data reception unit via the channel.
    Type: Application
    Filed: August 26, 2022
    Publication date: March 9, 2023
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jaeduk Han, Eunji Song, SangHun Lee, YunSeong Jo, HyeongMin Seo, Hyuntae Kim
  • Publication number: 20230071072
    Abstract: According to an aspect, a data inversion circuit configured to perform DBI-AC encoding using a PAM 4 signal may comprise a data generation unit configured to generate input data based on the PAM 4 signal, a channel comprising N data lines, a first auxiliary signal generation unit configured to generate a first auxiliary signal that determines whether to perform a first encoding on the input data based on the number of each of a plurality of data symbols included in the input data, a first data encoding unit configured to generate intermediate data by performing the first encoding on the input data based on the first auxiliary signal, a second auxiliary signal generation unit configured to generate a second auxiliary signal that determines whether to perform a third encoding on the intermediate data by analyzing the relationship between a plurality of data symbols at a current time point and a plurality of data symbols at a previous time point included in the intermediate data and a second data encoding unit c
    Type: Application
    Filed: August 26, 2022
    Publication date: March 9, 2023
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jaeduk HAN, Eunji SONG, SangHun LEE, YunSeong JO, HyeongMin SEO, Hyuntae KIM