Patents by Inventor Yunsheng Xia

Yunsheng Xia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12111568
    Abstract: A mask includes a first boundary area and a plurality of exposure pattern areas, the first boundary area including a region surrounding the plurality of exposure pattern areas; in the first boundary area is disposed a plurality of first overlay mark units, each of which includes a plurality of overlay marks; the plurality of overlay marks are sequentially arranged along extension directions of adjacent transversal or longitudinal first boundary lines; a plurality of first overlay mark units are symmetric in pairs with a central line of the mask as a symmetric axis, and two symmetric first overlay mark units form an overlay mark set; arrangement directions of two overlay marks in the first overlay mark units in the same overlay mark set are parallel to and displaced with respect to each other.
    Type: Grant
    Filed: October 2, 2021
    Date of Patent: October 8, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yunsheng Xia
  • Patent number: 11984406
    Abstract: The examples of the present application disclose a semiconductor structure and a method for manufacturing the same. The semiconductor structure includes: a functional structure and a first mark structure located on a substrate, in which the functional structure and the first mark structure have the same feature size; and a first dielectric layer located at the functional structure and the first mark structure, in which a thickness of the first dielectric layer at the functional structure is different from a thickness of the first dielectric layer at the first mark structure. The examples of the present application can improve the alignment accuracy of the manufacturing process and improve the product yield and production efficiency at the same time.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: May 14, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Yunsheng Xia, Jen-Chou Huang
  • Publication number: 20220139842
    Abstract: A semiconductor structure is provided, including several first patterns located in a photoresist layer with a thickness greater than 1.2 ?m and arranged in a first direction, and several second patterns arranged in a second direction. The first direction and the second direction have an included angle. The first patterns have a first arrangement length in the first direction. The second patterns have a second arrangement length in the second direction. An area sum of the first patterns and the second patterns is less than ½ of a product of the first arrangement length and the second arrangement length.
    Type: Application
    Filed: January 14, 2022
    Publication date: May 5, 2022
    Inventor: Yunsheng XIA
  • Publication number: 20220091516
    Abstract: A mask includes a first boundary area and a plurality of exposure pattern areas, the first boundary area including a region surrounding the plurality of exposure pattern areas; in the first boundary area is disposed a plurality of first overlay mark units, each of which includes a plurality of overlay marks; the plurality of overlay marks are sequentially arranged along extension directions of adjacent transversal or longitudinal first boundary lines; a plurality of first overlay mark units are symmetric in pairs with a central line of the mask as a symmetric axis, and two symmetric first overlay mark units form an overlay mark set; arrangement directions of two overlay marks in the first overlay mark units in the same overlay mark set are parallel to and displaced with respect to each other.
    Type: Application
    Filed: October 2, 2021
    Publication date: March 24, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yunsheng XIA
  • Publication number: 20210358858
    Abstract: The examples of the present application disclose a semiconductor structure and a method for manufacturing the same. The semiconductor structure includes: a functional structure and a first mark structure located on a substrate, in which the functional structure and the first mark structure have the same feature size; and a first dielectric layer located at the functional structure and the first mark structure, in which a thickness of the first dielectric layer at the functional structure is different from a thickness of the first dielectric layer at the first mark structure. The examples of the present application can improve the alignment accuracy of the manufacturing process and improve the product yield and production efficiency at the same time.
    Type: Application
    Filed: July 27, 2021
    Publication date: November 18, 2021
    Inventors: Yunsheng Xia, Jen-Chou Huang