Abstract: Provided is an array substrate. The array substrate includes: a base substrate; a plurality of clock lines; a plurality of clock leads; a plurality of shift register units; and a compensation capacitor plate, disposed on the base substrate and in the peripheral region, wherein the compensation capacitor plate is connected to the clock lead, and the compensation capacitor plate and the clock lead are in different layers, an area of the compensation capacitor plate being negatively correlated with a length of the clock lead connected to the compensation capacitor plate.

Abstract: A thin film transistor, an array substrate and a display device are provided. The thin film transistor is on a base substrate and includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing.

Abstract: An Embodiment of the present disclosure provide a display substrate, including a base substrate, and a plurality of first scanning lines, a plurality of second scanning lines, a plurality of data lines, a plurality of common electrodes and a plurality of pixel electrodes on the base substrate. The second scanning lines are parallel to the data lines, and the second scanning lines, the common electrodes and the pixel electrodes are in different layers. The common electrodes are located on a side of the second scanning lines and the data lines away from the base substrate, and on a side of the pixel electrodes proximal to the base substrate. An orthographic projection of one of the data line and the second scanning line on the base substrate is located in a spacer region between adjacent pixel electrodes.

Abstract: An array substrate includes a base substrate, pixel electrodes and common electrodes, first scan lines, second scan lines and data lines. The pixel electrode has first electrode strips disposed at intervals in a row direction. The common electrodes and the pixel electrodes are disposed on the same layer, and the common electrodes have second electrode strips disposed at intervals. The second electrode strips and the first electrode strips are alternatively arranged. The first scan line is located between two adjacent rows of pixel electrodes. The second scan line is located between two adjacent columns of pixel electrodes and is electrically connected to the first scan line, and the second scan line has a scan signal input terminal. The data line has a data signal input terminal. An orthographic projection of the data line on the base substrate intersects with a central region of the pixel electrode on the base substrate.

Abstract: A high-temperature superconducting flux pump system comprises a flux pump body, a superconducting load, and a stator group. A double-pancake coil group comprises at least one double-pancake coil. The stator group comprises at least one stator. The flux pump body has an air gap for receiving the stator group. The superconducting load and the stator group are connected to form a closed circuit. The high-temperature superconducting flux pump system has a simpler structure, solves the problem of low charging rate of magnets, and greatly reduces the power cost without changing the magnet structure and winding cost.

Abstract: The present disclosure relates to the field of display technologies and, in particular to a display panel and an electronic device. The display panel comprises: Q rows of first scanning line groups arranged sequentially along a column direction; M columns of second scanning line groups arranged sequentially along a row direction; and at least one gate drive circuit, located on a side of the Q-th row of the first scanning line groups away from the (Q?1)-th row of the first scanning line groups. Each gate drive circuit comprises Q columns of shift register unit groups cascaded in stages. The q-th stage of the shift register unit groups is connected with the q-th row of the first scanning line groups through at least one column of the second scanning line groups. M?Q>1, 1?q?Q, and M, N, Q, q are all positive integers.

Abstract: A high-temperature superconducting flux pump system comprises a flux pump body, a superconducting load, and a stator group. A double-pancake coil group comprises at least one double-pancake coil. The stator group comprises at least one stator. The flux pump body has an air gap for receiving the stator group. The superconducting load and the stator group are connected to form a closed circuit. The high-temperature superconducting flux pump system has a simpler structure, solves the problem of low charging rate of magnets, and greatly reduces the power cost without changing the magnet structure and winding cost.

Abstract: A display device and a manufacturing method thereof, an electronic device, and a light control panel are provided. The display device includes a light control panel and a display liquid crystal panel. The display liquid crystal panel is on a light-emitting side of the light control panel; the light control panel includes a light control region, and the light control region is configured to provide adjusted backlight to the display liquid crystal panel; the display liquid crystal panel includes a display region, and the display region is configured to receive the adjusted backlight to perform display; and a distance between two opposite edges of the light control region in at least one direction is greater than a distance between two opposite edges of the display region in the at least one direction.

Abstract: An array substrate includes a base substrate, pixel electrodes and common electrodes, first scan lines, second scan lines and data lines. The pixel electrode has first electrode strips disposed at intervals in a row direction. The common electrodes and the pixel electrodes are disposed on the same layer, and the common electrodes have second electrode strips disposed at intervals. The second electrode strips and the first electrode strips are alternatively arranged. The first scan line is located between two adjacent rows of pixel electrodes. The second scan line is located between two adjacent columns of pixel electrodes and is electrically connected to the first scan line, and the second scan line has a scan signal input terminal. The data line has a data signal input terminal. An orthographic projection of the data line on the base substrate intersects with a central region of the pixel electrode on the base substrate.

Abstract: A display device and a manufacturing method thereof, an electronic device, and a light control panel are provided. The display device includes a light control panel and a display liquid crystal panel. The display liquid crystal panel is on a light-emitting side of the light control panel; the light control panel includes a light control region, and the light control region is configured to provide adjusted backlight to the display liquid crystal panel; the display liquid crystal panel includes a display region, and the display region is configured to receive the adjusted backlight to perform display; and a distance between two opposite edges of the light control region in at least one direction is greater than a distance between two opposite edges of the display region in the at least one direction.

Abstract: An array substrate includes a base substrate, pixel electrodes and common electrodes, first scan lines, second scan lines and data lines. The pixel electrode has first electrode strips disposed at intervals in a row direction. The common electrodes and the pixel electrodes are disposed on the same layer, and the common electrodes have second electrode strips disposed at intervals. The second electrode strips and the first electrode strips are alternatively arranged. The first scan line is located between two adjacent rows of pixel electrodes. The second scan line is located between two adjacent columns of pixel electrodes and is electrically connected to the first scan line, and the second scan line has a scan signal input terminal. The data line has a data signal input terminal. An orthographic projection of the data line on the base substrate intersects with a central region of the pixel electrode on the base substrate.

Abstract: The present disclosure relates to the field of display technologies and, in particular to a display panel and an electronic device. The display panel comprises: Q rows of first scanning line groups arranged sequentially along a column direction; M columns of second scanning line groups arranged sequentially along a row direction; and at least one gate drive circuit, located on a side of the Q-th row of the first scanning line groups away from the (Q?1)-th row of the first scanning line groups. Each gate drive circuit comprises Q columns of shift register unit groups cascaded in stages. The q-th stage of the shift register unit groups is connected with the q-th row of the first scanning line groups through at least one column of the second scanning line groups. M?Q>1, 1?q?Q, and M, N, Q, q are all positive integers.

Abstract: There is provided a display substrate, including gate lines and data lines, which define pixel units, each pixel unit includes a pixel electrode, at least some pixel units are provided with a conductive bridge line in a same layer as the pixel electrode; in the pixel unit with the conductive bridge line, a first hollow structure is on a first side of a first or second end part of the pixel electrode, an end of the conductive bridge line is in the first hollow structure, a second hollow structure is on a second side of the first end part, an absolute value of a difference between parasitic capacitances respectively formed between the pixel electrode and the data lines on two sides of the pixel electrode and closest thereto is less than or equal to a preset capacitance difference value. A display panel and a display device are further provided.

Abstract: A display panel and a display device are provided. The display panel includes a first substrate and a second substrate arranged oppositely. The first substrate includes a spacer. The second substrate includes: a second base substrate; a data line including, a body portion and a bending portion; and a sub-pixel including a light transmission region. An orthographic projection of the spacer on the second base substrate is adjacent to that of the light transmission region on the second base substrate, the orthographic projection of the spacer on the second base substrate is spaced apart from that of the data line on the second base substrate; an orthographic projection of the bending portion on the second base substrate is bent toward a direction away from the orthographic projection of the spacer on the second base substrate with respect to an orthographic projection of the body portion on the second base substrate.

Abstract: A thin film transistor, an array substrate and a display device are provided. The thin film transistor is on a base substrate and includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing.

Abstract: Disclosed is an array substrate, a display panel, and a display apparatus, and belongs to the field of displays.

Abstract: A thin film transistor, an array substrate and a display device. The thin film transistor includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing. The first electrode includes a first overlapping end, an orthographic projection of the first overlapping end on the base substrate at least partially overlaps with an orthographic projection of the first body portion on the base substrate; a first compensation end at a side of the first overlapping end away from the first body portion; and a first intermediate portion connecting the first overlapping end and the first compensation end.

Abstract: A display panel and a display device are provided. The display panel includes a first substrate and a second substrate arranged oppositely. The first substrate includes a spacer. The second substrate includes: a second base substrate; a data line including, a body portion and a bending portion; and a sub-pixel including a light transmission region. An orthographic projection of the spacer on the second base substrate is adjacent to that of the light transmission region on the second base substrate, the orthographic projection of the spacer on the second base substrate is spaced apart from that of the data line on the second base substrate; an orthographic projection of the bending portion on the second base substrate is bent toward a direction away from the orthographic projection of the spacer on the second base substrate with respect to an orthographic projection of the body portion on the second base substrate.

Abstract: A display panel and a method for manufacturing the same, and a display device is provided. The display panel includes a display area including a plurality of gate lines arranged spaced apart in a first direction and a non-display area including a first and a second non-display area. At least one of the first or the second non-display area includes: a gate driving area including a plurality of gate driving units arranged spaced apart in the first direction and connected to the gate lines, a length of at least one gate driving unit being smaller than a length of a pixel in the first direction; a dummy gate driving area including a plurality of dummy gate driving units arranged spaced apart in the first direction; and a first trace area including a plurality of first traces connected to the dummy gate driving units and an external circuit.

Abstract: A driving method and driving circuit of a display panel, and a display apparatus are disclosed. The driving method includes: at a first display frequency and within a frame of scanning time, loading different first clock signals for 4N number of clock signal lines respectively, and controlling a plurality of shift registers in a gate driving circuit to work in sequence to cause the shift registers output different signals to drive gate lines row by row; and at a second display frequency and within a frame of scanning time, loading the same second clock signal for each clock signal line electrically connected to the same unit group, loading different second clock signals for clock signal lines that are electrically connected to different unit groups, and controlling the unit groups to work in sequence.