Patents by Inventor Yupeng Fan

Yupeng Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12224741
    Abstract: A control circuit includes a bias circuit. The bias circuit is configured to provide a bias current for a functional circuit. The bias circuit includes a first bias circuit and a second bias circuit. The first bias circuit is configured to provide a first bias current, and the second bias circuit is configured to provide a second bias current. Herein, the first bias current is smaller than the second bias current, the first bias circuit is configured to be in a normally open state after being powered on, and the second bias circuit is configured to receive a bias enabling signal and provide the second bias current based on the bias enabling signal.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: February 11, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yupeng Fan
  • Patent number: 12154612
    Abstract: Embodiments provide a control circuit and a semiconductor memory. The control circuit includes a bias switching circuit and a first logic gate circuit. The first logic gate circuit includes at least one target transistor. A substrate of one of the at least one target transistor is connected to an output terminal of the bias switching circuit. The first logic gate circuit has a first speed mode and a second speed mode. A transmission speed of the first speed mode is less than a transmission speed of the second speed mode. The bias switching circuit is configured to: receive a target signal, and output a target bias voltage, to increase a threshold voltage of the target threshold. The enabled state of the target signal represents that the first logic gate circuit is in the first speed mode.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: November 26, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yupeng Fan
  • Publication number: 20240351727
    Abstract: A melon packaging machine is disclosed, relating to the technical field of fruit packaging. The machine includes a workbench and a controller. A rectangular through groove is provided in a middle of the workbench. A conveyor is provided on one side of the rectangular through groove. A melon outlet is provided between the conveyor and a wall of the rectangular through groove. A detecting mechanism is provided at a middle of the conveyor for detecting the shape of the melons. Two limiting parts are provided at a top of the workbench for guiding the melons horizontally. It can be realized by the machine that the melon can be packed with suitable packing bag which be automatically selected according to the size of the melon. The packing efficiency of the melon can be improved and the manpower consumption can be reduced.
    Type: Application
    Filed: January 15, 2024
    Publication date: October 24, 2024
    Inventors: HUIJUN ZHANG, YUPENG FAN, LI JIA, JIAN MA, JINGJING WANG, CHUN LIU, HU LI, ZHONGZHOU YANG, ZHUGEN DENG
  • Publication number: 20230410876
    Abstract: A semiconductor device includes: a power down control circuit receiving a power down command signal and a chip selection signal, and generating a power down enable signal and a power down exit signal, here, a logic level of the power down enable signal is converted at a first edge of the power down command signal during a power down stage, and a logic level of the power down exit signal is converted at a second edge of the chip selection signal during a power down exit stage; a power control circuit stopping providing a power voltage according to the power down enable signal during the power down stage, and providing the power voltage according to the power down exit signal during the power down exit stage; and an input buffer circuit transmitting signals during the power down exit stage in response to the power down exit signal.
    Type: Application
    Filed: August 12, 2023
    Publication date: December 21, 2023
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yupeng FAN
  • Publication number: 20230386554
    Abstract: Embodiments provide a power supply switching circuit, which generates a first control signal jointly by utilizing a first input signal and a first drive signal opposite in phase to a second control signal, and generates the second control signal jointly by utilizing a second input signal and a second drive signal opposite in phase to the first control signal, such that time (i.e., overlap time) required for simultaneously turning on or off a first output subcircuit and a second output subcircuit is greatly reduced or even eliminated, effective output of an output node is implemented, and reliability of a device is improved. Furthermore, compared with eliminating the overlap time by means of delay, eliminating the overlap time by means of the power supply switching circuit is simple and reliable in control logic and is insensitive to process, which further improves the reliability of the device.
    Type: Application
    Filed: June 1, 2023
    Publication date: November 30, 2023
    Inventor: Yupeng FAN
  • Publication number: 20230307032
    Abstract: Embodiments provide a control circuit and a semiconductor memory. The control circuit includes a bias switching circuit and a first logic gate circuit. The first logic gate circuit includes at least one target transistor. A substrate of one of the at least one target transistor is connected to an output terminal of the bias switching circuit. The first logic gate circuit has a first speed mode and a second speed mode. A transmission speed of the first speed mode is less than a transmission speed of the second speed mode. The bias switching circuit is configured to: receive a target signal, and output a target bias voltage, to increase a threshold voltage of the target threshold. The enabled state of the target signal represents that the first logic gate circuit is in the first speed mode.
    Type: Application
    Filed: June 30, 2022
    Publication date: September 28, 2023
    Inventor: Yupeng FAN
  • Publication number: 20230025992
    Abstract: A control circuit includes a bias circuit. The bias circuit is configured to provide a bias current for a functional circuit. The bias circuit includes a first bias circuit and a second bias circuit. The first bias circuit is configured to provide a first bias current, and the second bias circuit is configured to provide a second bias current. Herein, the first bias current is smaller than the second bias current, the first bias circuit is configured to be in a normally open state after being powered on, and the second bias circuit is configured to receive a bias enabling signal and provide the second bias current based on the bias enabling signal.
    Type: Application
    Filed: September 27, 2022
    Publication date: January 26, 2023
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yupeng FAN
  • Publication number: 20110250138
    Abstract: The invention provides modified oligonucleotides of formula (I), comprising at least one metal chelator which provides a powerful tool for study of the pharmacokinetics of siRNA and its correlation with in vivo activity. The chelated metals provide luminescent properties enable detection of the oligonucleotides through the use of time-resolved fluorescent quenching based on energy transfer from the metal ion to a nonfluorescent quencher which can be used as non-isotopic labels of oligonucleotides for diagnostics and evaluation of cellular uptake.
    Type: Application
    Filed: July 30, 2008
    Publication date: October 13, 2011
    Applicant: ALNYLAM PHARMACEUTICALS, INC.
    Inventors: Yupeng Fan, Martin Maier, Rajendra K. Pandey, Muthiah Manoharan, Kallanthottathil G. Rajeev