Patents by Inventor Yuqing Gong

Yuqing Gong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11073550
    Abstract: A test vehicle, along with methods for fabricating and using a test vehicle, are disclosed herein. In one example, a test vehicle is provided that includes a substrate, at least a first passive die mounted on the substrate, and at least a first test die mounted on the substrate. The first test die includes test circuitry configured to test continuity through solder interconnects formed between the substrate and the first passive die.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: July 27, 2021
    Assignee: XILINX, INC.
    Inventors: Yuqing Gong, Suresh Parameswaran, Boon Y. Ang
  • Patent number: 10262911
    Abstract: A circuit for testing bond connections between a first die and a second die is described. The circuit comprises a defect monitoring circuit implemented on the first die, which is configured as a test die; and a plurality of bond connections between the first die and the second die; wherein the defect monitoring circuit is configured to detect a defect in a bond connection of the plurality of bond connections between the first die and the second die. A method of testing bond connections between a first die and a second die is also described.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: April 16, 2019
    Assignee: XILINX, INC.
    Inventors: Yuqing Gong, Henley Liu, Myongseob Kim, Suresh P. Parameswaran, Cheang-Whang Chang, Boon Y. Ang
  • Patent number: 8810269
    Abstract: An integrated circuit (IC) comprises routing circuitry including a plurality of signal line segments in routing layers of the IC, and a plurality of micro-bump contacts coupled to the routing circuitry. The IC includes a plurality of test circuits coupled to respective subsets of the plurality of signal line segments. Each test circuit is configured to connect micro-bump contacts in the respective subset to form first and second sets of daisy chains. Each test circuit is configured to test the first and second sets of daisy chains for open circuits and test for short circuits between the first and second sets of daisy chains. Each test circuit is configured to determine the locations of detected open circuits and determine the locations of detected short circuits.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: August 19, 2014
    Assignee: Xilinx, Inc.
    Inventors: Yuqing Gong, Henley Liu, Myongseob Kim, Suresh P. Parameswaran, Cheang-Whang Chang, Boon Y. Ang
  • Publication number: 20140091819
    Abstract: An integrated circuit (IC) comprises routing circuitry including a plurality of signal line segments in routing layers of the IC, and a plurality of micro-bump contacts coupled to the routing circuitry. The IC includes a plurality of test circuits coupled to respective subsets of the plurality of signal line segments. Each test circuit is configured to connect micro-bump contacts in the respective subset to form first and second sets of daisy chains. Each test circuit is configured to test the first and second sets of daisy chains for open circuits and test for short circuits between the first and second sets of daisy chains. Each test circuit is configured to determine the locations of detected open circuits and determine the locations of detected short circuits.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: XILINX, INC.
    Inventors: Yuqing Gong, Henley Liu, Myongseob Kim, Suresh P. Parameswaran, Cheang-Whang Chang, Boon Y. Ang