Abstract: Embodiments of the invention relate to a spatial stereoscopic display device and an operating method thereof. The spatial stereoscopic display device comprises: a laser source; a two-dimensional scanning unit, receiving and projecting the laser light onto a variable isoclinic transflective unit; the variable isoclinic transflective unit, receiving and dividing the laser light into a first and second splitting lights intersecting in an imaging space, by transmission and reflection; a power source and position sensor unit, connected with the variable isoclinic transflective unit to control an intersection of the first and second splitting lights in the imaging space; the imaging space, provided with an up-conversion material inside, and the up-conversion material at the intersection of the first and second splitting lights is excited to form a light-emitting point; and the 3D modulator, connected with the laser source, the two-dimensional scanning unit, the power source and position sensor unit.

Abstract: A method for manufacturing an array substrate includes: forming a shielding layer, an insulating buffer layer, active layers, a gate insulating layer and NMOS gate electrodes in a display area and a drive area on a substrate in sequence; forming a PMOS gate electrode in the drive area on the foregoing substrate, in which the NMOS gate electrodes and the PMOS gate electrode are provided on the same layer; meanwhile forming a first through hole in a common electrode connecting area, in which the first through hole is configured to connect the shielding layer and a source/drain electrode layer; forming an intermediate insulating layer on the foregoing substrate, forming a second through hole in the common electrode connecting area and third through holes in the display area and the drive area, in which the second through hole is formed at a same position as the first through hole and configured to connect the shielding layer and a source/drain electrode layer, and the third through holes are configured to connec

Abstract: An apparatus for finding a syncmark in a data sector includes a syncmark detection circuit, decoder, fragment information table and syncmark recovery circuit. The syncmark detection circuit is operable to detect a syncmark in each of a number of fragments of the data sector and to compute a syncmark quality for each of the syncmarks. The decoder is operable to apply a data decoding algorithm to encoded data for the data sector. The encoded data has start points identified by the syncmark in each of the fragments. The fragment information table stores the syncmark quality for each of the syncmarks. The syncmark recovery sweeps the start points over search ranges for selected fragments for which the syncmark detection circuit failed to detect the syncmark and which have a lower syncmark quality than others of the fragments.

Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for calibration during data processing. As an example, a data processing system is discussed that includes a sample averaging circuit operable to average digital samples from an analog to digital converter circuit over multiple instances of an analog input to yield an X-average output, and a selector circuit operable to select one of the digital samples or the X-average output as a processing output.

Abstract: Disclosed are a display device and a method for manufacturing the same. The display device includes a Thin Film Transistor (TFT) substrate and a color filter substrate opposite to each other. The TFT substrate includes a first TFT element and a second TFT element and a light-transmittance region between the first and second TFT elements is a pixel region; and a pixel unit arranged on a surface of the TFT substrate facing the color filter substrate and located on a surface of the pixel region, where the pixel unit includes a transparent reference potential layer arranged on the surface of the TFT substrate facing the color filter substrate and a nontransparent deformation layer arranged over the reference potential layer, with the deformation layer being insulated from the reference potential layer.

Abstract: The present invention provides a hydrothermal oxidation method for producing alkali metal dichromate from carbon ferrochrome, and the method comprises the following steps: formulating an initial reaction liquid by mixing carbon ferrochrome, an alkaline substance and water, in which the actual addition amount of the alkali is controlled smaller than the theoretically required amount; adding the initial reaction liquid into a reaction kettle, charging an oxidizing gas into the reaction kettle, and allowing the reaction to proceed for 0.5 to 3 h at a temperature of 150° C. to 370° C. and a pressure of 2 Mpa to 24 MPa; carrying out solid-liquid separation, cooling the resultant filtrate to a temperature of ?12° C. to ?20° C.

Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for data synchronization and detection.

Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for data synchronization and detection.

Abstract: A method for manufacturing an array substrate includes: forming a shielding layer, an insulating buffer layer, active layers, a gate insulating layer and NMOS gate electrodes in a display area and a drive area on a substrate in sequence; forming a PMOS gate electrode in the drive area on the foregoing substrate, in which the NMOS gate electrodes and the PMOS gate electrode are provided on the same layer; meanwhile forming a first through hole in a common electrode connecting area, in which the first through hole is configured to connect the shielding layer and a source/drain electrode layer; forming an intermediate insulating layer on the foregoing substrate, forming a second through hole in the common electrode connecting area and third through holes in the display area and the drive area, in which the second through hole is formed at a same position as the first through hole and configured to connect the shielding layer and a source/drain electrode layer, and the third through holes are configured to connec

Abstract: Disclosed are a display device and a method for manufacturing the same. The display device includes a Thin Film Transistor (TFT) substrate and a color filter substrate opposite to each other. The TFT substrate includes a first TFT element and a second TFT element and a light-transmittance region between the first and second TFT elements is a pixel region; and a pixel unit arranged on a surface of the TFT substrate facing the color filter substrate and located on a surface of the pixel region, where the pixel unit includes a transparent reference potential layer arranged on the surface of the TFT substrate facing the color filter substrate and a nontransparent deformation layer arranged over the reference potential layer, with the deformation layer being insulated from the reference potential layer.

Abstract: Embodiments of the disclosure provide an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a thin film transistor formed on a base substrate, a plurality of strip pixel electrodes connected to a drain electrode of the thin film transistor, and a common electrode overlapping with and insulating from the plurality of strip pixel electrodes. The drain electrode has an extension portion, the extension portion extends in an arrangement direction of the plurality of strip pixel electrodes, and each of the strip pixel electrodes is connected to the extension portion.

Abstract: A hard disk drive or other storage device comprises a storage medium, a read/write head, and read channel circuitry coupled to the read/write head. The read channel circuitry comprises a despreader configured to generate a stitched logic sector by stitching together subsectors of that logic sector that were interleaved with subsectors of other logic sectors for storage on the storage medium, and a subsector bridging control module configured to control a number of bridging bits inserted by the despreader between a given pair of adjacent subsectors of the stitched logic sector. The subsector bridging control module may be illustratively configured to cause the despreader to insert a sufficient number of bridging bits between each pair of adjacent subsectors of the stitched logic sector so as to prevent discontinuities that might otherwise arise from use of X-averaging in generation of Y samples from X samples in a retry mode of operation.

Abstract: The present invention provides a hydrothermal oxidation method for producing alkali metal dichromate from carbon ferrochrome, and the method comprises the following steps: formulating an initial reaction liquid by mixing carbon ferrochrome, an alkaline substance and water, in which the actual addition amount of the alkali is controlled smaller than the theoretically required amount; adding the initial reaction liquid into a reaction kettle, charging an oxidizing gas into the reaction kettle, and allowing the reaction to proceed for 0.5 to 3 h at a temperature of 150° C. to 370° C. and a pressure of 2 Mpa to 24 MPa; carrying out solid-liquid separation, cooling the resultant filtrate to a temperature of ?12° C. to ?20° C.

Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for calibration during data processing.

Abstract: Embodiments of the present invention provide an array substrate, a liquid crystal display apparatus and an alignment rubbing method. The array substrate comprises a gate line, a data line, and a pixel unit defined by the gate line and the data line intersecting each other, as well as an alignment film formed on the array substrate. The pixel unit each comprises a thin film transistor, a first electrode, and a second electrode provided with slits; and a first non-zero preset angle is present between a slit-direction of the second electrode and a data-line-direction, a second non-zero preset angle is present between a rubbing direction of the alignment film and the slit-direction of the second electrode, and an angle between the rubbing direction of the alignment film and the data-line-direction is greater than the second non-zero preset angle.

Abstract: Embodiments of the invention relate to a spatial stereoscopic display device and an operating method thereof. The spatial stereoscopic display device comprises: a laser source; a two-dimensional scanning unit, receiving and projecting the laser light onto a variable isoclinic transflective unit; the variable isoclinic transflective unit, receiving and dividing the laser light into a first and second splitting lights intersecting in an imaging space, by transmission and reflection; a power source and position sensor unit, connected with the variable isoclinic transflective unit to control an intersection of the first and second splitting lights in the imaging space; the imaging space, provided with an up-conversion material inside, and the up-conversion material at the intersection of the first and second splitting lights is excited to form a light-emitting point; and the 3D modulator, connected with the laser source, the two-dimensional scanning unit, the power source and position sensor unit.

Abstract: A quantization circuit includes a plurality of resistors, a plurality of tap points, and a plurality of coarse comparators. Each coarse comparator has a first input coupled to an input voltage and a second input coupled to a corresponding coarse tap point voltage. Each coarse comparator operates during a first phase to produce a “1” only if the input voltage exceeds the corresponding coarse tap point voltage. A plurality of fine comparators each have a first input coupled to the input voltage, and each fine comparator operates during a second phase to produce a fine output level indicative of whether the input voltage exceeds a corresponding tap point voltage of a group of tap points located immediately below the tap point connected to the highest coarse comparator producing a “1”.

Abstract: A quantization circuit includes a plurality of resistors, a plurality of tap points, and a plurality of coarse comparators. Each coarse comparator has a first input coupled to an input voltage and a second input coupled to a corresponding coarse tap point voltage. Each coarse comparator operates during a first phase to produce a “1” only if the input voltage exceeds the corresponding coarse tap point voltage. A plurality of fine comparators each have a first input coupled to the input voltage, and each fine comparator operates during a second phase to produce a fine output level indicative of whether the input voltage exceeds a corresponding tap point voltage of a group of tap points located immediately below the tap point connected to the highest coarse comparator producing a “1”.

Abstract: An integrator stage for use in a delta sigma modulator includes an operational amplifier, an integration capacitor coupling an output of the operational amplifier and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors having first plates coupled electrically in common at a common plate node and switching circuitry for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch for selectively coupling the common plate node and the summing node during an integration phase.

Abstract: An integrator stage for use in a delta sigma modulator includes an operational amplifier, an integration capacitor coupling an output of the operational amplifier and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors having first plates coupled electrically in common at a common plate node and switching circuitry for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch for selectively coupling the common plate node and the summing node during an integration phase.