Patents by Inventor Yury Uralsky

Yury Uralsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10424074
    Abstract: Methods and apparatuses are disclosed for reporting texture footprint information. A texture footprint identifies the portion of a texture that will be utilized in rendering a pixel in a scene. The disclosed methods and apparatuses advantageously improve system efficiency in decoupled shading systems by first identifying which texels in a given texture map are needed for subsequently rendering a scene. Therefore, the number of texels that are generated and stored may be reduced to include the identified texels. Texels that are not identified need not be rendered and/or stored.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: September 24, 2019
    Assignee: NVIDIA Corporation
    Inventors: Yury Uralsky, Henry Packard Moreton, Eric Brian Lum, Jonathan J. Dunaisky, Steven James Heinrich, Stefano Pescador, Shirish Gadre, Michael Alan Fetterman
  • Publication number: 20190236828
    Abstract: In various embodiments, a parallel processor implements a graphics processing pipeline that generates rendered images. In operation, the parallel processor causes execution threads to execute a task shading program on an input mesh to generate a task shader output specifying a mesh shader count. The parallel processor then generates mesh shader identifiers, where the total number of the mesh shader identifiers equals the mesh shader count. For each mesh shader identifier, the parallel processor invokes a mesh shader based on the mesh shader identifier and the task shader output to generate geometry associated with the mesh shader identifier. Subsequently, the parallel processor performs operations on the geometries associated with the mesh shader identifiers to generate a rendered image. Advantageously, unlike conventional graphics processing pipelines, the performance of the graphics processing pipeline is not limited by a primitive distributor.
    Type: Application
    Filed: January 26, 2018
    Publication date: August 1, 2019
    Inventors: Ziyad HAKURA, Yury URALSKY, Christoph KUBISCH, Pierre BOUDIER, Henry MORETON
  • Publication number: 20190236827
    Abstract: In various embodiments, a parallel processor implements a graphics processing pipeline that generates rendered images via a shading program. In operation, the parallel processor causes a first set of execution threads to execute the shading program on a first portion of the input mesh to generate first geometry stored in an on-chip memory. The parallel processor also causes a second set of execution threads to execute the mesh shading program on a second portion of the input mesh to generate second geometry stored in the on-chip memory. Subsequently, the parallel processor reads the first geometry and the second geometry from the on-chip memory, and performs operations on the first geometry and the second geometry to generate a rendered image derived from the input mesh. Advantageously, unlike conventional graphics processing pipelines, the performance of the graphics processing pipeline is not limited by a primitive distributor.
    Type: Application
    Filed: January 26, 2018
    Publication date: August 1, 2019
    Inventors: Ziyad HAKURA, Yury URALSKY, Christoph KUBISCH, Pierre BOUDIER, Henry MORETON
  • Publication number: 20190236829
    Abstract: In various embodiments, a deduplication application pre-processes index buffers for a graphics processing pipeline that generates rendered images via a shading program. In operation, the deduplication application causes execution threads to identify a set of unique vertices specified in an index buffer based on an instruction. The deduplication application then generates a vertex buffer and an indirect index buffer based on the set of unique vertices. The vertex buffer and the indirect index buffer are associated with a portion of an input mesh. The graphics processing pipeline then renders a first frame and a second frame based on the vertex buffer, the indirect index buffer, and the shading program. Advantageously, the graphics processing pipeline may re-use the vertex buffer and indirect index buffer until the topology of the input mesh changes.
    Type: Application
    Filed: January 26, 2018
    Publication date: August 1, 2019
    Inventors: Ziyad HAKURA, Yury URALSKY, Christoph KUBISCH, Pierre BOUDIER, Henry MORETON
  • Patent number: 10147222
    Abstract: A multi-pass unit interoperates with a device driver to configure a screen space pipeline to perform multiple processing passes with buffered graphics primitives. The multi-pass unit receives primitive data and state bundles from the device driver. The primitive data includes a graphics primitive and a primitive mask. The primitive mask indicates the specific passes when the graphics primitive should be processed. The state bundles include one or more state settings and a state mask. The state mask indicates the specific passes where the state settings should be applied. The primitives and state settings are interleaved. For a given pass, the multi-pass unit extracts the interleaved state settings for that pass and configures the screen space pipeline according to those state settings. The multi-pass unit also extracts the interleaved graphics primitives to be processed in that pass. Then, the multi-pass unit causes the screen space pipeline to process those graphics primitives.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: December 4, 2018
    Assignee: NVIDIA CORPORATION
    Inventors: Ziyad Hakura, Cynthia Allison, Dale Kirkland, Jeffrey Bolz, Yury Uralsky, Jonah Alben
  • Publication number: 20180322682
    Abstract: Techniques for rendering images on multiple tilted displays concurrently to mitigate perspective distortion are disclosed herein. According to one described approach, viewports are assigned to a center monitor and two peripheral monitors. Scene data for the viewports is calculated, and geometric primitives are generated for the viewports based on the scene data. Image transformation is performed based on a modified perspective value to modify geometry of the geometric primitives based on tilt angles of the displays, and the geometric primitives are rasterized using the modified geometry.
    Type: Application
    Filed: July 17, 2017
    Publication date: November 8, 2018
    Inventors: Rouslan Dimitrov, Yury Uralsky, Lars Nordskog, Dmitriy Zhdan
  • Publication number: 20180322683
    Abstract: Techniques for rendering images on multiple tilted displays concurrently to mitigate perspective distortion are disclosed herein. According to one described approach, viewports are assigned to a center monitor and two peripheral monitors. Scene data for the viewports is calculated, and geometric primitives are generated for the viewports based on the scene data. Image transformation is performed based on a modified perspective value to modify geometry of the geometric primitives based on tilt angles of the displays, and the geometric primitives are rasterized using the modified geometry.
    Type: Application
    Filed: July 17, 2017
    Publication date: November 8, 2018
    Inventors: Rouslan Dimitrov, Yury Uralsky, Lars Nordskog, Dmitry Zhdan
  • Patent number: 10078911
    Abstract: A system, method, and computer program product are provided for executing processes involving at least one primitive in a graphics processor, utilizing a data structure. In operation, a data structure is associated with at least one primitive. Additionally, a plurality of processes involving the at least one primitive are executed in a graphics processor, utilizing the data structure. Moreover, the plurality of processes include at least one of selecting at least one surface or portion thereof to which to render, or selecting at least one of a plurality of viewports.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: September 18, 2018
    Assignee: NVIDIA Corporation
    Inventors: Ziyad Sami Hakura, Yury Uralsky, Tyson Bergland, Eric Brian Lum, Jerome F. Duluk, Henry Packard Moreton
  • Patent number: 9761037
    Abstract: A graphics processing subsystem and method for updating a voxel representation of a scene. One embodiment of the graphics processing subsystem includes: (1) a memory configured to store a voxel representation of a scene having first and second regions to be updated, and (2) a graphics processing unit (GPU) operable to: (2a) unify the first and second regions into a bounding region if a volume thereof does not exceed summed volumes of the first and second regions by more than a tolerance, and (2b) generate voxels for the bounding region and cause the voxels to be stored in the voxel representation.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: September 12, 2017
    Assignee: Nvidia Corporation
    Inventors: Alexey Panteleev, Sergey Bolotov, Evgeny Makarov, Yury Uralsky
  • Patent number: 9754407
    Abstract: A system, method, and computer program product are provided for shading using a dynamic object-space grid. An object defined by triangle primitives in a three-dimensional (3D) space that is specific to the object is received and an object-space shading grid is defined for a first triangle primitive of the triangle primitives based on coordinates of the first triangle primitive in the 3D space. A shader program is executed by a processing pipeline to compute a shaded value at a point on the object-space shading grid for the first triangle primitive.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: September 5, 2017
    Assignee: NVIDIA Corporation
    Inventors: Anjul Patney, Eric B. Enderton, Eric B. Lum, Marco Salvi, Christopher Ryan Wyman, Yubo Zhang, Yong He, G. Evan Hart, Jr., Kayvon Fatahalian, Yury Uralsky, Henry Packard Moreton, Aaron Eliot Lefohn
  • Patent number: 9747718
    Abstract: A system, method, and computer program product are provided for performing object-space shading. A primitive defined by vertices in three-dimensional (3D) space that is specific to an object defined by at least the primitive is received and a shading sample rate is computed for the primitive based on a screen-space derivative of coordinates of a pixel fragment transformed into the 3D space. A shader program is executed by a processing pipeline to compute shaded attributes for the primitive according to the computed shading sample rate.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: August 29, 2017
    Assignee: NVIDIA Corporation
    Inventors: Anjul Patney, Eric B. Enderton, Eric B. Lum, Marco Salvi, Christopher Ryan Wyman, Yubo Zhang, Yong He, G. Evan Hart, Jr., Kayvon Fatahalian, Yury Uralsky, Henry Packard Moreton, Aaron Eliot Lefohn
  • Publication number: 20170148204
    Abstract: A multi-pass unit interoperates with a device driver to configure a screen space pipeline to perform multiple processing passes with buffered graphics primitives. The multi-pass unit receives primitive data and state bundles from the device driver. The primitive data includes a graphics primitive and a primitive mask. The primitive mask indicates the specific passes when the graphics primitive should be processed. The state bundles include one or more state settings and a state mask. The state mask indicates the specific passes where the state settings should be applied. The primitives and state settings are interleaved. For a given pass, the multi-pass unit extracts the interleaved state settings for that pass and configures the screen space pipeline according to those state settings. The multi-pass unit also extracts the interleaved graphics primitives to be processed in that pass. Then, the multi-pass unit causes the screen space pipeline to process those graphics primitives.
    Type: Application
    Filed: November 25, 2015
    Publication date: May 25, 2017
    Inventors: Ziyad HAKURA, Cynthia ALLISON, Dale KIRKLAND, Jeffrey BOLZ, Yury URALSKY, Jonah ALBEN
  • Publication number: 20170148203
    Abstract: A multi-pass unit interoperates with a device driver to configure a screen space pipeline to perform multiple processing passes with buffered graphics primitives. The multi-pass unit receives primitive data and state bundles from the device driver. The primitive data includes a graphics primitive and a primitive mask. The primitive mask indicates the specific passes when the graphics primitive should be processed. The state bundles include one or more state settings and a state mask. The state mask indicates the specific passes where the state settings should be applied. The primitives and state settings are interleaved. For a given pass, the multi-pass unit extracts the interleaved state settings for that pass and configures the screen space pipeline according to those state settings. The multi-pass unit also extracts the interleaved graphics primitives to be processed in that pass. Then, the multi-pass unit causes the screen space pipeline to process those graphics primitives.
    Type: Application
    Filed: November 25, 2015
    Publication date: May 25, 2017
    Inventors: Ziyad HAKURA, Cynthia ALLISON, Dale KIRKLAND, Jeffrey BOLZ, Yury URALSKY, Jonah ALBEN
  • Patent number: 9633469
    Abstract: A system, method, and computer program product are provided for conservative rasterization of primitives using an error term. In use, an edge equation is determined for each edge of a primitive, the edge equation having coefficients defining the edge of the primitive. Each edge of the primitive is shifted to enlarge the primitive by modifying coefficients of the edge equation defining the edge by an error term that is a predetermined amount. Pixels that intersect the primitive are then determined using the enlarged primitive.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 25, 2017
    Assignee: NVIDIA Corporation
    Inventors: Eric Brian Lum, Walter Robert Steiner, Henry Packard Moreton, Justin L. Cobb, Barry Nolan Rodgers, Yury Uralsky, Timo Oskari Aila, Tero Tapani Karras
  • Patent number: 9390543
    Abstract: A graphics processing subsystem and method for computing a 3D clipmap. One embodiment of the subsystem includes: (1) a renderer operable to render a primitive surface representable by a 3D clipmap, (2) a geometry shader (GS) configured to select respective major-plane viewports for a plurality of clipmap levels, the major-plane viewports being sized to represent full spatial extents of the 3D clipmap relative to a render target (RT) for the plurality of clipmap levels, (3) a rasterizer configured to employ the respective major-plane viewports and the RT to rasterize a projection of the primitive surface onto a major plane corresponding to the respective major-plane viewports into pixels representing fragments of the primitive surface for each of the plurality of clipmap levels, and (4) a plurality of pixel shader (PS) instances configured to transform the fragments into respective voxels in the plurality of clipmap levels, thereby voxelizing the primitive surface.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: July 12, 2016
    Assignee: Nvidia Corporation
    Inventors: Alexey Panteleev, Yury Uralsky, Evgeny Makarov, Henry Moreton, Sergey Bolotov, Eric B Lum
  • Patent number: 9390540
    Abstract: A deferred shading GPU, geometry data structure and method. One embodiment of the geometry data structure is found in a graphics processing subsystem operable to render a scene having a pixel represented by samples. The graphics processing subsystem includes: (1) a memory configured to store a geometry data structure associated with the pixel containing surface fragment coverage masks associated with the samples, and (2) a GPU configured to employ the surface fragment coverage masks to carry out deferred shading on the pixel.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: July 12, 2016
    Assignee: Nvidia Corporation
    Inventor: Yury Uralsky
  • Patent number: 9367946
    Abstract: A computing system and method for representing volumetric data for a scene. One embodiment of the computing system includes: (1) a memory configured to store a three-dimensional (3D) clipmap data structure having at least one clip level and at least one mip level, and (2) a processor configured to generate voxelized data for a scene and cause the voxelized data to be stored in the 3D clipmap data structure.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: June 14, 2016
    Assignee: NVIDIA CORPORATION
    Inventors: Alexey Panteleev, Yury Uralsky, Evgeny Makarov, Henry Moreton, Sergey Bolotov, Eric Lum, Alexey Barkovoy, Cyril Crassin
  • Patent number: 9355483
    Abstract: A system, method, and computer program product are provided for shading primitive fragments. A target buffer may be recast when shaded samples that are covered by a primitive fragment are generated at a first shading rate using a first sampling mode, the shaded samples are stored in the target buffer that is associated with the first sampling mode and the first shading rate, a second sampling mode is determined, and the target buffer is associated with the second sampling mode. A sampling mode and/or shading rate may be changed for a primitive. A primitive fragment that is associated with a first sampling mode and a first shading rate is received and a second sampling mode is determined for the primitive fragment. Shaded samples corresponding to the primitive fragment are generated, at a second shading rate, using the second sampling mode and the shaded samples are stored in a target buffer.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: May 31, 2016
    Assignee: NVIDIA Corporation
    Inventors: Eric B. Lum, Rouslan L. Dimitrov, Ignacio Llamas Ubieto, Patrick James Neill, Yury Uralsky, Albert Meixner
  • Patent number: 9305388
    Abstract: A system, method, and computer program product are provided for using a bit-count texture format. A rasterized coverage bit mask is received by a texture processing unit from a bit-count format texture map, the rasterized coverage bit mask is converted to a scalar value, and the scalar value is processed while the rasterized coverage bit mask is retained in the bit-count format texture map. The coverage bit mask may be converted by computing a count of samples that are covered by at least one graphics primitive according to the rasterized coverage bit mask.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: April 5, 2016
    Assignee: NVIDIA Corporation
    Inventors: Evgeny Evgenievich Makarov, Alexey Yuryevich Panteleev, Sergey Aleksandrovich Bolotov, Yury Uralsky
  • Patent number: 9286659
    Abstract: A system, method, and computer program product are provided for multi-sample processing. The multi-sample pixel data is received and is analyzed to identify subsets of samples of a multi-sample pixel that have equal data, such that data for one sample in a subset represents multi-sample pixel data for all samples in the subset. An encoding state is generated that indicates which samples of the multi-sample pixel are included in each one of the subsets.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 15, 2016
    Assignee: NVIDIA Corporation
    Inventors: Alexander Lev Minkin, Henry Packard Moreton, Yury Uralsky, Eric Brian Lum, Dale L. Kirkland, Steven James Heinrich, Rui Manuel Bastos, Emmett M. Kilgariff, Jeffrey Alan Bolz, Tyson Bergland, Patrick R. Brown