Patents by Inventor Yury Y. Uralsky
Yury Y. Uralsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160071242Abstract: A raster unit is configured to generate different sample patterns for adjacent pixels within a given frame. In addition, the raster unit may adjust the sample patterns between frames. The raster unit includes an index unit that selects a sample pattern table for use with a current frame. For a given pixel, the index unit extracts a sample pattern from the selected sample pattern table. The extracted sample pattern is used to generate coverage information for the pixel. The coverage information for all pixels is then used to generate an image. The resultant image may then be filtered to reduce or remove artifacts induced by the changing of sample locations.Type: ApplicationFiled: September 5, 2015Publication date: March 10, 2016Inventors: Yury Y. URALSKY, Jonah M. ALBEN, Ankan BANJEREE, Gregory MASSAL, Thomas PETERSON, Oleg KUZNETSOV, Eric B. LUM, Prakshep MEHTA
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Publication number: 20150097847Abstract: One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that the PTE does not include a mapping from a virtual address to a physical address, then the MMU responds to the request based on the sparse status. If the sparse status is active, then the MMU determines the physical address based on whether the type of the request is a write operation and, subsequently, generates an acknowledgement of the request. By contrast, if the sparse status is not active, then the MMU generates a page fault. Advantageously, the disclosed embodiments enable the computer system to manage sparse mappings without incurring the performance degradation associated with both page faults and conventional software-based sparse mapping management.Type: ApplicationFiled: October 4, 2013Publication date: April 9, 2015Applicant: NVIDIA CORPORATIONInventors: Jonathan DUNAISKY, Henry Packard MORETON, Jeffrey A. BOLZ, Yury Y. URALSKY, James Leroy DEMING, Rui M. BASTOS, Patrick R. BROWN, Amanpreet GREWAL, Christian AMSINCK, Poornachandra RAO, Jerome F. DULUK, JR., Andrew J. TAO
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Publication number: 20150084974Abstract: One embodiment sets forth a method for allocating memory to surfaces. A software application specifies surface data, including interleaving state data. Based on the interleaving state data, a surface access unit bloats addressees derived from discrete coordinates associated with the surface, creating a bloated virtual address space with a predictable pattern of addresses that do not correspond to data. Advantageously, by creating predictable regions of addresses that do not correspond to data, the software application program may configure the surface to share physical memory space with one or more other surfaces. In particular, the software application may map the virtual address space together with one or more virtual address spaces corresponding to complementary data patterns to the same physical base address. And, by overlapping the virtual address spaces onto the same pages in physical address space, the physical memory may be more densely packed than by using prior-art allocation techniques.Type: ApplicationFiled: September 20, 2013Publication date: March 26, 2015Applicant: NVIDIA CORPORATIONInventors: Eric B. LUM, Cass W. EVERITT, Henry Packard MORETON, Yury Y. URALSKY, Cyril CRASSIN, Jerome F. DULUK, Jr.
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Publication number: 20150049110Abstract: One embodiment sets forth a method for transforming 3-D images into 2-D rendered images using render target sample masks. A software application creates multiple render targets associated with a surface. For each render target, the software application also creates an associated render target sample mask configured to select one or more samples included in each pixel. Within the graphics pipeline, a pixel shader processes each pixel individually and outputs multiple render target-specific color values. For each render target, a ROP unit uses the associated render target sample mask to select covered samples included in the pixel. Subsequently, the ROP unit uses the render target-specific color value to update the selected samples in the render target, thereby achieving sample-level color granularity.Type: ApplicationFiled: August 16, 2013Publication date: February 19, 2015Applicant: NVIDIA CORPORATIONInventors: Eric B. LUM, Jerome F. DULUK, JR., Yury Y. URALSKY, Rouslan DIMITROV, Rui M. BASTOS
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Publication number: 20140267266Abstract: One embodiment of the present invention sets forth a technique for performing voxelization. The technique involves determining that a voxel is intersected by a first graphics primitive that has a front side and a back side and selecting one or more reference points within the voxel. The technique further involves, for each reference point, determining a distance from the reference point to the first graphics primitive and storing a first scalar value in an array based on the distance. The sign of the first scalar value reflects whether the reference point is located on the front side of the first graphics primitive or on the back side of the first graphics primitive.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: NVIDIA CORPORATIONInventors: Cyril CRASSIN, Yury Y. URALSKY, Eric ENDERTON, Eric B. LUM, Jerome F. DULUK, JR., Henry Packard MORETON, David LUEBKE
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Publication number: 20140267264Abstract: One embodiment of the present invention sets forth a technique for performing voxelization. The technique involves identifying a voxel that is intersected by a first graphics primitive that has a front side and a back side and selecting a plurality of sample points within the voxel. The technique further involves determining, for each sample point included in the plurality of sample points, whether the sample point is located on the front side of the first graphics primitive or on the back side of the first graphics primitive. Finally, the technique involves storing, for at least a first sample point included in the plurality of sample points, a first result in a voxel mask reflecting whether the first sample point is located on the front side of the first graphics primitive or on the back side of the first graphics primitive.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: NVIDIA CORPORATIONInventors: Cyril CRASSIN, Yury Y. URALSKY, Eric ENDERTON, Eric B. LUM, Jerome F. DULUK, JR., Henry Packard MORETON, David LUEBKE
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Publication number: 20140267265Abstract: One embodiment of the present invention sets forth a technique for performing voxelization. The technique involves determining that a first graphics primitive intersects a voxel and calculating a first set of coefficients associated with a first plane defined by the intersection of the first graphics primitive and the voxel. The technique further involves determining that a second graphics primitive intersects the voxel and calculating a second set of coefficients associated with a second plane defined by the intersection of the second graphics primitive and the voxel. The technique further involves calculating a third set of coefficients associated with a third surface based on the first set of coefficients and the second set of coefficients. The technique further involves calculating at least one of an amount of the voxel that is located on the back side of the third surface and an occlusion value based on the third set of coefficients.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: NVIDIA CORPORATIONInventors: Cyril CRASSIN, Yury Y. URALSKY, Eric ENDERTON, Eric B. LUM, Jerome F. DULUK, JR., Henry Packard MORETON, David LUEBKE
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Publication number: 20140267224Abstract: Techniques are disclosed for storing post-z coverage data in a render target. A color raster operations (CROP) unit receives a coverage mask associated with a portion of a graphics primitive, where the graphics primitive intersects a pixel that includes a multiple samples, and the portion covers at least one sample. The CROP unit stores the coverage mask in a data field in the render target at a location associated with the pixel. One advantage of the disclosed techniques is that the GPU computes color and other pixel information only for visible fragments as determined by post-z coverage data. The GPU does not compute color and other pixel information for obscured fragments, thereby reducing overall power consumption and improving overall render performance.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: NVIDIA CORPORATIONInventors: Eric B. LUM, Rui Bastos, Jerome F. Duluk, JR., Henry Packard Moreton, Yury Y. Uralsky
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Publication number: 20140125669Abstract: Techniques are disclosed for processing graphics objects in a stage of a graphics processing pipeline. The techniques include receiving a graphics primitive associated with the graphics object, and determining a plurality of attributes corresponding to one or more vertices associated with the graphics primitive. The techniques further include determining values for one or more state parameters associated with a downstream stage of the graphics processing pipeline based on a visual effect associated with the graphics primitive. The techniques further include transmitting the state parameter values to the downstream stage of the graphics processing pipeline. One advantage of the disclosed techniques is that visual effects are flexibly and efficiently performed.Type: ApplicationFiled: November 7, 2012Publication date: May 8, 2014Applicant: NVIDIA CORPORATIONInventors: Emmett M. KILGARIFF, Morgan McGUIRE, Yury Y. URALSKY, Ziyad S. HAKURA
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Patent number: 7965291Abstract: A graphics system utilizes a graphics processing unit to implement marching tetrahedra extraction of an isosurface. In one embodiment locations of tetrahedral grids are represented as groups of four vertices for processing in the graphics processing unit.Type: GrantFiled: November 3, 2006Date of Patent: June 21, 2011Assignee: Nvidia CorporationInventor: Yury Y. Uralsky
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Patent number: 7924290Abstract: A method and system for performing a texture operation with user-specified offset positions are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of deriving a first destined texel position based on an original sample position associated with a pixel projected in a texture map and a first offset position specified by a user and fetching texel attributes at the first destined texel position for the texture operation.Type: GrantFiled: May 30, 2007Date of Patent: April 12, 2011Assignee: NVIDIA CorporationInventors: Anders M. Kugler, Alexander L. Minkin, William P. Newhall, Jr., Christopher J. Migdal, Pemith R. Fernando, Lup-Yen Peter Young, Mehmet Cem Cebenoyan, Yury Y. Uralsky
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Publication number: 20080297528Abstract: A method and system for performing a texture operation with user-specified offset positions are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of deriving a first destined texel position based on an original sample position associated with a pixel projected in a texture map and a first offset position specified by a user and fetching texel attributes at the first destined texel position for the texture operation.Type: ApplicationFiled: May 30, 2007Publication date: December 4, 2008Inventors: Anders M. KUGLER, Alexander L. Minkin, William P. Newhall, JR., Christopher J. Migdal, Pemith R. Fernando, Lup-Yen Peter Young, Mehmet Cem Cebenoyan, Yury Y. Uralsky