Patents by Inventor Yusaku Katsube

Yusaku Katsube has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929687
    Abstract: Provided is a power converter that allows a reduction in EMC noise current flowing through a control circuit board. A power converter 1 includes a semiconductor module 52, a capacitor 51, a control circuit board 45a, positive and negative-side bus bars 41, 42 connecting the semiconductor module 52 and the capacitor 51, a base 33 electrically connected to a ground of the control circuit board 45a, the control circuit board 45a being placed on the base 33, and an electrical conductor 35 electrically connected to the base 33 and extending in a stacking direction in which the base 33 and the control circuit board 45a are stacked. The positive and negative-side bus bars 41, 42 extend around the electrical conductor 35 and are connected to the semiconductor module 52.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: March 12, 2024
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Youhei Nishizawa, Akihiro Goto, Yusaku Katsube
  • Patent number: 11456675
    Abstract: Since inductance due to wiring to a Y capacitor is large, it is necessary to arrange the Y capacitor near a bus bar, and there is no degree of freedom in arranging the Y capacitor. Directions of currents flowing through a positive electrode side wiring 301 and a negative electrode side wiring 302 in a multi-core cable 300 are a direction 301a from a bus bar positive electrode terminal 114 toward the Y capacitor positive electrode terminal 201, and a direction 302b from a bus bar negative electrode terminal 115 toward the Y capacitor negative electrode terminal 202, respectively. On the other hand, a direction of a current flowing through a ground wiring 303 is a direction 302b from a Y capacitor ground terminal 203 toward a ground terminal 116.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: September 27, 2022
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Yusaku Katsube, Hiroki Funato, Isao Hoda, Aya Ohmae, Fusanori Nishikimi, Yutaka Okubo
  • Patent number: 11348735
    Abstract: A high voltage filter includes an anode bus bar, a cathode bus bar, a first capacitive element connected between the anode bus bar and a ground connector connected to a ground, a second capacitive element connected between the cathode bus bar and the ground connector, and a third capacitive element connected between the anode bus bar and the cathode bus bar. An anode terminal of the first capacitive element and a cathode terminal of the third capacitive element are arranged adjacent to each other, and a cathode terminal of the second capacitive element and an anode terminal of the third capacitive element are arranged adjacent to each other.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: May 31, 2022
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Isao Houda, Aya Ohmae, Hiroki Funato, Yusaku Katsube, Ayumu Hatanaka
  • Patent number: 11296613
    Abstract: The inductance of a noise filter circuit is reduced, and an output is increased, whereby positive and negative electrode power supply side conductors each include a first and second conductor portions having a side surface and a main surface having an area larger than an area of the side surface. The first conductor portions are arranged on one surface of a base portion with an insulating member interposed therebetween. The second conductor portions penetrate through a core member in a state in which the main surfaces face each other. A width of a portion of the first conductor portion which is in contact with the insulating member in a direction perpendicular to current flow direction is larger than a width of a portion of the second conductor portion which is disposed within the core member in the direction perpendicular to current flow direction.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: April 5, 2022
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Youhei Nishizawa, Fusanori Nishikimi, Yusaku Katsube
  • Patent number: 11122717
    Abstract: To obtain, in an on-board control device, a shield effect against noise radiated from an electronic component. The present invention includes: an electronic component 103; a metal housing 101 which covers at least a part of the electronic component 103; a metal portion 105 which is provided so that the electronic component 103 is disposed between the metal portion 105 and the metal housing 101; and a shield structure which shields radiation noise from the electronic component 103 by electrostatic capacitive coupling formed between the metal portion 105 and the metal housing 101.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: September 14, 2021
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Yoko Ohkubo, Hideyuki Sakamoto, Yusaku Katsube
  • Patent number: 10856845
    Abstract: An ultrasound diagnosis device includes: an ultrasound probe which transmits an ultrasound wave toward a examinee and receives a reflected wave from the examinee; and a main device which controls the transmitting and receiving of the ultrasound waves from the ultrasound probe and is operated to receive a receiving signal obtained by receiving the reflected wave from the examinee by the ultrasound probe, to generate an ultrasound image of the examinee, and to display the ultrasound image on a display screen, wherein the ultrasound probe includes a plurality of subarrays having a plurality of element circuits transmitting and receiving ultrasound signals and a plurality of reference voltage sources, and the plurality of subarrays and the plurality of reference voltage sources have a one-to-one correspondence.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: December 8, 2020
    Assignee: HITACHI, LTD.
    Inventors: Yusaku Katsube, Tatsuo Nakagawa, Yasuyuki Okuma, Yohei Nakamura, Takahide Terada, Shinya Kajiyama, Takuma Nishimoto, Yutaka Igarashi
  • Patent number: 10799213
    Abstract: Provided are an ultrasound probe, an element circuit thereof, and an ultrasound diagnostic device, whereby high image quality is possible and reduced size and lower cost are made possible. Provided is an ultrasound probe, comprising: a 2-D array transducer wherein a plurality of transducers are arrayed two-dimensionally; and a 2-D array IC in which are formed, upon an IC substrate, drive circuits which are disposed upon each of the transducers of the 2-D array transducer to drive each of the transducers at different timings with a prescribed delay quantity, and common current sources which supply drive current to the transducers of the 2-D array transducer. The number n of the common current sources which are formed upon the IC substrate is fewer than the number N of the drive circuits which are formed upon the IC substrate.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: October 13, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Takuma Nishimoto, Yutaka Igarashi, Toru Yazaki, Kengo Imagawa, Yusaku Katsube
  • Patent number: 10700015
    Abstract: The electronic control unit ECU includes: a base 2 that has a bottom surface portion 7 on which a printed circuit board 3 is mounted and an opening opposed to the bottom surface portion 7; and a cover 1 that covers at least a part of the bottom surface portion 7 and is engaged with the base 2. Here, the cover 1 includes an overlap portion 5 that is spaced apart from and opposed to a side surface 11 of the base 2, and the overlap portion 5 includes a slit 15.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: June 30, 2020
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Yusaku Katsube, Masayuki Kawabata, Shoho Ishikawa, Kentaro Yamanaka
  • Patent number: 10595822
    Abstract: A test for screening defects of a transmission/reception circuit in an IC is enabled at low cost, without withstand voltage violation, and without carrying out electrical contacts with many terminals connected to oscillators. In a transmission/reception separation switch circuit using transistors as switch elements, a potential of a gate is lowered in a test more than the potential in a case of reception to avoid gate-source withstand-voltage violation when a large-amplitude signal is input, and an internal-signal loopback test is carried out without destroying a reception circuit.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: March 24, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Kajiyama, Yutaka Igarashi, Yusaku Katsube, Takuma Nishimoto
  • Patent number: 10458956
    Abstract: Provided is an ultrasonic probe having an adjustable slew rate, the ultrasonic probe having minimal dimensions and circuit sizes. The ultrasonic probe includes: a transducer; a transmitting circuit; a correcting unit; and a distributing unit. The transmitting circuit includes a transducer driving unit and a current source. The transducer driving unit includes a current mirror of a low voltage transistor and a high voltage transistor. The high voltage transistor is connected to the transducer and the current source supplies an operating current to the low voltage transistor of the transducer driving unit. The correcting unit includes a transmission circuit driving unit replica, a bias unit, and an observing unit. The distributing unit transfers a signal to a current source of the transmitting circuit so that the same current value as the current value extracted by the observing unit flows.
    Type: Grant
    Filed: November 27, 2015
    Date of Patent: October 29, 2019
    Assignee: HITACHI, LTD.
    Inventors: Takuma Nishimoto, Yutaka Igarashi, Yusaku Katsube
  • Patent number: 10448923
    Abstract: Amplification of a signal by a small circuit size and reduction of a power are achieved. A current controlling current source unit 53 changes an outputting current based on a transition time setting signal tp. A current controlling current source unit 54 changes a drawing current based on a transition time setting signal tn. An amplitude control unit 55 changes a power source voltage supplied to the current controlling current source unit 53 and changes amplitude of a voltage generated by a current outputted from the current controlling current source unit 53, based on amplitude setting signal ap. An amplitude control unit 56 changes a power source voltage supplied to the current controlling current source unit 54 and changes amplitude of a voltage generated by the current drawn by the current controlling current source unit 54, based on amplitude setting signal an.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: October 22, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Takuma Nishimoto, Yutaka Igarashi, Yusaku Katsube, Kengo Imagawa
  • Publication number: 20170370886
    Abstract: Provided is an ultrasonic probe having an adjustable slew rate, the ultrasonic probe having minimal dimensions and circuit sizes. The ultrasonic probe includes: a transducer; a transmitting circuit; a correcting unit; and a distributing unit. The transmitting circuit includes a transducer driving unit and a current source. The transducer driving unit includes a current mirror of a low voltage transistor and a high voltage transistor. The high voltage transistor is connected to the transducer and the current source supplies an operating current to the low voltage transistor of the transducer driving unit. The correcting unit includes a transmission circuit driving unit replica, a bias unit, and an observing unit. The distributing unit transfers a signal to a current source of the transmitting circuit so that the same current value as the current value extracted by the observing unit flows.
    Type: Application
    Filed: November 27, 2015
    Publication date: December 28, 2017
    Applicant: HITACHI, LTD.
    Inventors: Takuma Nishimoto, Yutaka Igarashi, Yusaku Katsube
  • Patent number: 9356810
    Abstract: A semiconductor integrated circuit includes a first wireless access system reception unit including a first analog reception unit and a first digital reception unit, a voltage-controlled oscillator, a phase locked loop, and a digital interface. The first analog reception unit comprises a first reception mixer for down-converting an RF reception signal into a first analog reception signal and a first analog-digital converter for converting the first analog reception signal into a first digital reception signal. The first wireless access system reception unit, the voltage-controlled oscillator, and the phase locked loop enable switching from a reception operation for a first RF reception signal of a first system to a reception operation for a second RF reception signal of a second system.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: May 31, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yutaka Igarashi, Yusaku Katsube
  • Publication number: 20160006477
    Abstract: A semiconductor integrated circuit includes an operational amplifier that amplifies a voltage difference between an input voltage supplied to an inverting input terminal and a reference voltage supplied to a non-inverting input terminal and outputs an amplified signal, a feedback resistor that performs negative feedback of the amplified signal to the inverting input terminal of the operational amplifier, and a variable resistor unit that sets a current path with a first resistance value in accordance with a control signal between an external input terminal and the inverting input terminal of the operational amplifier, and sets a first alternative path with a second resistance value in accordance with the control signal between a node on the current path and a reference voltage terminal to which the reference voltage is supplied.
    Type: Application
    Filed: September 17, 2015
    Publication date: January 7, 2016
    Inventors: Yutaka Igarashi, Yusaku Katsube
  • Patent number: 9160281
    Abstract: A semiconductor integrated circuit includes an operational amplifier that amplifies a voltage difference between an input voltage supplied to an inverting input terminal and a reference voltage supplied to a non-inverting input terminal and outputs an amplified signal, a feedback resistor that performs negative feedback of the amplified signal to the inverting input terminal of the operational amplifier, and a variable resistor unit that sets a current path with a first resistance value in accordance with a control signal between an external input terminal and the inverting input terminal of the operational amplifier, and sets a first alternative path with a second resistance value in accordance with the control signal between a node on the current path and a reference voltage terminal to which the reference voltage is supplied.
    Type: Grant
    Filed: June 29, 2013
    Date of Patent: October 13, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Yutaka Igarashi, Yusaku Katsube
  • Publication number: 20150010113
    Abstract: A semiconductor integrated circuit includes a first wireless access system reception unit including a first analog reception unit and a first digital reception unit, a voltage-controlled oscillator, a phase locked loop, and a digital interface. The first analog reception unit comprises a first reception mixer for down-converting an RF reception signal into a first analog reception signal and a first analog-digital converter for converting the first analog reception signal into a first digital reception signal. The first wireless access system reception unit, the voltage-controlled oscillator, and the phase locked loop enable switching from a reception operation for a first RF reception signal of a first system to a reception operation for a second RF reception signal of a second system.
    Type: Application
    Filed: September 22, 2014
    Publication date: January 8, 2015
    Inventors: Yutaka Igarashi, Yusaku Katsube
  • Patent number: 8816766
    Abstract: A semiconductor integrated circuit includes: a first capacitance element and a second capacitance element; a first amplification circuit that amplifies a potential difference of a first voltage signal and a second voltage signal supplied via the first capacitance element and the second capacitance element, respectively, to output a first amplification signal and a second amplification signal; a first resistance element that feeds back the first amplification signal to one input terminal of the first amplification circuit; a second resistance element that feeds back the second amplification signal to another input terminal of the first amplification circuit; a voltage generator that generates a predetermined voltage; and a third resistance element that transmits the predetermined voltage generated by the voltage generator to each input terminal of the first amplification circuit.
    Type: Grant
    Filed: October 27, 2012
    Date of Patent: August 26, 2014
    Assignee: Renesas Mobile Corporation
    Inventors: Yutaka Igarashi, Yusaku Katsube
  • Publication number: 20140043099
    Abstract: A semiconductor integrated circuit includes an operational amplifier that amplifies a voltage difference between an input voltage supplied to an inverting input terminal and a reference voltage supplied to a non-inverting input terminal and outputs an amplified signal, a feedback resistor that performs negative feedback of the amplified signal to the inverting input terminal of the operational amplifier, and a variable resistor unit that sets a current path with a first resistance value in accordance with a control signal between an external input terminal and the inverting input terminal of the operational amplifier, and sets a first alternative path with a second resistance value in accordance with the control signal between a node on the current path and a reference voltage terminal to which the reference voltage is supplied.
    Type: Application
    Filed: June 29, 2013
    Publication date: February 13, 2014
    Inventors: Yutaka Igarashi, Yusaku Katsube
  • Patent number: 8594605
    Abstract: The present invention is directed to accurately set a frequency characteristic of a filter integrated in a semiconductor integrated circuit. A semiconductor integrated circuit includes a filter circuit, a cutoff frequency calibration circuit, and a Q-factor calibration circuit. The cutoff frequency calibration circuit adjusts cutoff frequency of the filter circuit to a desired value by adjusting capacitance components of the filter circuit. After adjustment of the cutoff frequency of the filter circuit by the cutoff frequency calibration circuit, the Q-factor calibration circuit adjusts the Q factor of the filter circuit to a desired value by adjusting a resistance component of the filter circuit.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: November 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Yusaku Katsube, Kosuke Tsuiji, Yutaka Igarashi, Akio Yamamoto
  • Patent number: 8538364
    Abstract: Gain setting can be performed at high speed while reducing DC offset due to a filter cutoff frequency changeover without the need for input signal muting. A filter circuit having first and second filters is capable of allowing settings of first and second cutoff frequencies. First and second filter switch circuits and a charging circuit including a charging resistor and a charging switch are provided. For a first time period, the first switch circuit is controllably turned on while the second switch circuit is controllably turned off, thereby providing the first filter function. For a second time period, the first switch circuit is controllably turned off while the second switch circuit is controllably turned on, thereby providing the second filter function. For the first time period, the charging switch is controllably turned on so that the second capacitor is charged via the charging resistor.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: September 17, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Yusaku Katsube, Junichi Takahashi, Masaaki Yamada, Toshihito Habuka, Kenichi Shibata, Fumihito Yamaguchi