Abstract: The logic format of a mask ROM (10) is composed of a user region (11) having a plurality of blocks, a spare region (12) having a plurality of blocks, and a table region (13) having a plurality of blocks. When the outside data is written in the mask ROM by the control of a MPU (24), if there is a defective block in the user region, the defective block is replaced by a spare block in the spare region. If the spare block is defective, it is replaced by another spare block. The replacement information (address, et.) is stored in a block in the table region, and if the block of the table region is defective, it is replaced by another block. Accordingly, since a defective block in the mask ROM (10) is replaced by another block, a defective mask ROM is relieved.

Abstract: The logic format of a mask ROM (10) is composed of a user region (11) having a plurality of blocks, a spare region (12) having a plurality of blocks, and a table region (13) having a plurality of blocks. When the outside data is written in the mask ROM by the control of a MPU (24), if there is a defective block in the user region, the defective block is replaced by a spare block in the spare region. If the spare block is defective, it is replaced by another spare block. The replacement information (address, et.) is stored in a block in the table region, and if the block of the table region is defective, it is replaced by another block. Accordingly, since a defective block in the mask ROM (10) is replaced by another block, a defective mask ROM is relieved.

Abstract: A solid state disk system having an electrically erasable and programmable read only memory is disclosed. The solid state disk system comprises a host interface for inputting data from and outputting data to a host computer located outside of said solid state disk system, a buffer memory coupled to the host interface for temporally storing data, an EEPROM coupled to the buffer memory, a micro-controller coupled to the host interface and buffer memory for controlling a replacement procedure. The EEPROM has a memory region divided into a plurality of blocks each of which is erased at the same time. The memory region has a user block region storing data accessed from the host computer, a spare block region storing data from the outside for replacing any defective block within the user block region, and a replacement information region storing information about an address of a spare block corresponding to the defective block.

Abstract: A method for transforming a logic format includes dividing a data segment into a main data segment having a main segment length and a sub data segment having a sub segment length shorter than the main segment length, allotting the main data segment and the sub data segment respectively to a main address and a sub address of a data storage unit, and defining a combination of a data format of a main data area defined by the main segment length and the number of main addresses and of a data format of a sub data area defined by the sub segment length and the number of sub addresses, as a logic format of the data storage unit. A determination is made at an arbitrary time whether the average of the length of all the data stored in the data storage unit is less than a threshold value. The sub segment length is shortened in response to a determination that the average length of all the data stored in the data storage unit is less than a threshold value.

Abstract: An audio recorder obtains a PCM audio signal from input analog or digital audio data, encodes the PCM audio signal, and stores the encoded signal in a semiconductor memory. The encoding method is selectable from at least two different methods, providing different levels of audio quality. The semiconductor memory may be internal to the audio recorder, or may be an external memory device such as a flash memory card. An audio player decodes the signal stored in the semiconductor memory, and converts the decoded signal to a selected one of at least two output formats.

Abstract: An internal state determining apparatus according to the present invention includes at least one inner circuit, means for detecting a change in voltage supplied from an external device and outputting a detected signal in response to the change in voltage and internal state determining means for determining the inner circuit so as to fall into a predetermined state in response to the detected signal, as components that make up the internal state determining apparatus. Owing to the internal state determining apparatus having such a construction, when an IC card is activated in response to two types of different voltages, for example, an internal state of the IC card can be determined.