Abstract: Embodiments are directed to polymer blends and molded articles including polymer blends. Embodiments of the polymer blend may include 1 to 40 wt. % of a crystalline block composite and from 60 wt. % to 99 wt. % of an ionomer formed from a partially neutralized precursor acid copolymer. The crystalline block composite may include an EP-iPP diblock polymer, an isotactic polypropylene homopolymer, and a copolymer of ethylene and propylene. The crystalline block composite may include greater than 50 wt. % of the isotactic polypropylene homopolymer. The precursor acid copolymer may include copolymerized units of ethylene and 5 wt. % to 30 wt. %, based on the total weight of the precursor acid copolymer, of copolymerized units of an ?,?-ethylenically unsaturated carboxylic acid having 3 to 8 carbon atoms. About 25% to about 65% of the acid groups derived from the ?,?-ethylenically unsaturated carboxylic acid of the precursor acid copolymer may be neutralized.

Abstract: A peak detector including an input transistor, an isolation transistor, at least one load transistor, a buffer, a control transistor, a current source and at least one resistor. The isolation transistor isolates the input and load transistors from the supply voltage for power supply rejection. The buffer, control transistor, current source and resistor(s) bias the input transistor to remain in a saturation region and each load transistor to remain in a triode region. The buffer may be a unity gain buffer. The control transistor may match each load transistor with matching threshold voltages. An input bias circuit may be included to bias an input node to a direct-current voltage. The load transistor(s) may be biased to have so that the output voltage is proportional to a peak voltage of the input node. The peak detector may be configured to detect multiple inputs and may have shared circuitry.

Abstract: An integrated circuit includes a first plurality of circuits receiving a first internal power supply voltage, a first regulator receiving an external power supply voltage and supplying the first internal power supply voltage at a first rated power in response to the external power supply voltage when the integrated circuit is in an active mode, a second regulator receiving the external power supply voltage for supplying the first internal power supply voltage at a second rated power less than said first rated power in response to the external power supply voltage when the integrated circuit is in a low power mode, and a controller controlling a transition of the integrated circuit between the active mode and the low power mode. The controller activates all of the first plurality of circuits in the active mode, but only a subset of them while keeping remaining ones inactive in the low power mode.