Patents by Inventor Yushi Jinno

Yushi Jinno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8003978
    Abstract: The invention prevents a photocurrent due to external light and a variation in characteristics of transistors or a failure by a short circuit due to the influence of a back channel. A light shield film made of a nonconductive material is formed on an insulation substrate. A back gate insulation film is formed covering the light shield film. An active layer is formed on this back gate insulation film. A gate insulation film is formed covering the active layer, and a gate electrode is formed on the gate insulation film. The light shield film is disposed covering the active layer with the back gate insulation film interposed therebetween, having a function of shielding the active layer from external light entering through the insulation substrate.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: August 23, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yushi Jinno
  • Patent number: 7234984
    Abstract: An organic EL element of one pixel is selectively irradiated with laser light. With the laser irradiation, the functionality of the organic layer of the organic EL element is selectively degraded and the light emission capability is removed without damaging the cathode.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: June 26, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Ryuji Nishikawa, Yushi Jinno, Takashi Ogawa, Ryouzou Nagata
  • Publication number: 20070132673
    Abstract: Each pixel has a display element, a pixel transistor which controls an operation of the display element, and a storage capacitor which stores charges corresponding to display data for a predetermined period. During a normal operation, a capacitor signal to be output to a capacitor line connected to each storage capacitor is AC driven in a predetermined period to improve display quality or the like. A structure to fix the capacitor signal to be output to the capacitor line to a fixed level during defect inspection of the pixel or the like is formed on a substrate simultaneously with a pixel circuit or the like. With this structure, the inspection precision can be improved when the defect inspection of each pixel is to be detected from capacitance value data or the like in each pixel. It is also possible to allow setting of the fixed level in the inspection to an arbitrary inspection voltage suitable for the inspection.
    Type: Application
    Filed: October 4, 2006
    Publication date: June 14, 2007
    Inventors: Yushi Jinno, Kyoji Ikeda, Kenya Uesugi
  • Publication number: 20070069205
    Abstract: The invention prevents a photocurrent due to external light and a variation in characteristics of transistors or a failure by a short circuit due to the influence of a back channel. A light shield film made of a nonconductive material is formed on an insulation substrate. A back gate insulation film is formed covering the light shield film. An active layer is formed on this back gate insulation film. A gate insulation film is formed covering the active layer, and a gate electrode is formed on the gate insulation film. The light shield film is disposed covering the active layer with the back gate insulation film interposed therebetween, having a function of shielding the active layer from external light entering through the insulation substrate.
    Type: Application
    Filed: September 25, 2006
    Publication date: March 29, 2007
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Yushi Jinno
  • Patent number: 7163833
    Abstract: An array test is performed during the process of panel formation, such as at a stage where a driving TFT which supplies a drive current for an organic EL element is completed and an anode of the organic EL element has been formed on the TFT. Then, with regard to a defective pixel, a line connecting the driving TFT and the anode is disconnected using a laser. After the line has been thus disconnected, a planarization insulating film is formed, and this film fills the holes caused by the laser irradiation. It is thus possible to suppress deterioration of pixels and also effectively darken a defective pixel using laser.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: January 16, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yushi Jinno
  • Patent number: 7045818
    Abstract: In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: May 16, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yushi Jinno, Shiro Nakanishi, Kyoko Hirai, Tsutomu Yamada, Yoshihiro Morimoto, Kiyoshi Yoneda
  • Patent number: 7033872
    Abstract: A thin film transistor which can be used in an LCD display panel includes an insulator substrate, a gate electrode located on the insulator substrate, an insulator film provided on the insulator substrate and the gate electrode, and a polycrystalline silicon film located on the insulator film. A channel is defined in a first portion of the polycrystalline silicon film over the gate electrode, and a drain and a source are defined in second and third portions of the polycrystalline silicon film over the insulator substrate. Grain sizes of the drain and source are equal to or greater than a grain size of the channel.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: April 25, 2006
    Assignees: Sanyo Electric., Ltd., Sony Corporation
    Inventors: Yushi Jinno, Ken Wakita, Masahiro Minegishi
  • Patent number: 6914448
    Abstract: Transistor capacitance Cdtr inevitably generated between the gate and the drain of a second TFT is increased. Accordingly, an operation test of a first TFT and the second TFT can be conducted by turning on the first TFT to charge the transistor capacitance Cdtr and detecting the stored charges.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: July 5, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yushi Jinno
  • Publication number: 20050110736
    Abstract: Immediately after formation of, for example, power supply lines formed on a same substrate and set to a same potential, defect examination is applied and a repair line is formed connecting deficient defect (disconnection) portion of the power supply line, directly covering the power supply line. The repair line can be formed through a drawing process by scanning with a laser beam within a gas atomospshere of a conductive material such as, for example, tungsten, to connect ends of the disconnection. By repairing the power supply line by directly covering the power supply line, an increase in a line resistance is inhibited and flatness above the repair line is further improved.
    Type: Application
    Filed: September 29, 2004
    Publication date: May 26, 2005
    Inventor: Yushi Jinno
  • Publication number: 20050099550
    Abstract: In a deficient defect (disconnection) portion of, for example, power supply lines formed on a same substrate and set to a same potential, ends of the disconnection and power supply lines adjacent to the power supply line in which disconnection occurs are connected by a same repair line. The repair line pattern can be formed, for example, through a drawing process by scanning a formation region of the repair line pattern with a laser beam in a gas atmosphere of a conductive material such as tungsten. By connecting the repair line pattern to not only the disconnection portion, but also to adjacent power supply lines, the line resistance can be reduced and flatness over the repair line pattern can be improved.
    Type: Application
    Filed: September 29, 2004
    Publication date: May 12, 2005
    Inventor: Yushi Jinno
  • Patent number: 6828952
    Abstract: A UV laser beam is selectively irradiated on an active layer (semiconductor layer) of a second TFT in a pixel, so as to degrade crystallinity of the active layer and thereby execute electrical disconnection. According to this method, dimming out of pixels can be performed without generating undesirable influences in other components. By directing the laser beam to a portion of the active layer located beneath the gate electrode, the laser beam can be reflected by the gate electrode, allowing execution of a more efficient laser irradiation.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: December 7, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yushi Jinno
  • Publication number: 20040241925
    Abstract: A thin film transistor which can be used in an LCD display panel includes an insulator substrate, a gate electrode located on the insulator substrate, an insulator film provided on the insulator substrate and the gate electrode, and a polycrystalline silicon film located on the insulator film. A channel is defined in a first portion of the polycrystalline silicon film over the gate electrode, and a drain and a source are defined in second and third portions of the polycrystalline silicon film over the insulator substrate. Grain sizes of the drain and source are equal to or greater than a grain size of the channel.
    Type: Application
    Filed: July 1, 2004
    Publication date: December 2, 2004
    Applicants: Sanyo Electric Co., Ltd., Sony Corporation
    Inventors: Yushi Jinno, Ken Wakita, Masahiro Minegishi
  • Publication number: 20040233370
    Abstract: An electric shielding wire made of Cr is provided near the edge of a substrate, in which the electric shielding wire is a lower electric layer for an TFT element. Because countermeasures against static electricity are taken at an early manufacturing stage of the substrate, the elements formed on the substrate are protected against damage due to static electricity generated in subsequent stages. The electricity shielding wire is ultimately used as a pedestal for a wire. With this arrangement, characteristics of various elements of a driver-integrated LCD are protected against deterioration due to static electricity generated in a manufacturing process.
    Type: Application
    Filed: June 22, 2004
    Publication date: November 25, 2004
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Yushi Jinno, Kyoko Hirai
  • Publication number: 20040229387
    Abstract: An array test is performed during the process of panel formation, such as at a stage where a driving TFT which supplies a drive current for an organic EL element is completed and an anode of the organic EL element has been formed on the TFT. Then, with regard to a defective pixel, a line connecting the driving TFT and the anode is disconnected using a laser. After the line has been thus disconnected, a planarization insulating film is formed, and this film fills the holes caused by the laser irradiation. It is thus possible to suppress deterioration of pixels and also effectively darken a defective pixel using laser.
    Type: Application
    Filed: April 15, 2004
    Publication date: November 18, 2004
    Inventor: Yushi Jinno
  • Publication number: 20040183074
    Abstract: In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.
    Type: Application
    Filed: April 5, 2004
    Publication date: September 23, 2004
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Yushi Jinno, Shiro Nakanishi, Kyoko Hirai, Tsutomu Yamada, Yoshihiro Morimoto, Kiyoshi Yoneda
  • Publication number: 20040169628
    Abstract: A sealing material is formed to cover a drain driver comprising a horizontal shift register and a sampling portion and its edge lines are linear on the horizontal shift register. Operation characteristics of TFT elements just below the sealing material are changed and are different from those of TFT elements of the area not below the sealing material. However, operation characteristics do not differ between phases of the shift register, and adverse effects for display can be prevented.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 2, 2004
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Yushi Jinno, Kyoko Hirai
  • Patent number: 6774957
    Abstract: An electric shielding wire made of Cr is provided near the edge of a substrate, in which the electric shielding wire is a lower electric layer for an TFT element. Because countermeasures against static electricity are taken at an early manufacturing stage of the substrate, the elements formed on the substrate are protected against damage due to static electricity generated in subsequent stages. The electricity shielding wire is ultimately used as a pedestal for a wire. With this arrangement, characteristics of various elements of a driver-integrated LCD are protected against deterioration due to static electricity generated in a manufacturing process.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: August 10, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yushi Jinno, Kyoko Hirai
  • Patent number: 6768480
    Abstract: When a first transistor for switching Tr1 is ON by a gate signal, a voltage signal in accordance with a data voltage signal input to the source terminal of the first transistor Tr1 is held in a storage capacitor. A second transistor Tr2 controls an amount of current supplied to an emissive element from a power source line PVdd in accordance with the voltage signal, and a charge is accumulated in an additional capacitor C2 in accordance with the amount of current thus controlled. Defect inspection corresponding to the actual display state can be performed by examining the charge accumulated in the additional capacitor C2.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: July 27, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yushi Jinno
  • Patent number: 6750086
    Abstract: In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: June 15, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yushi Jinno, Shiro Nakanishi, Kyoko Hirai, Tsutomu Yamada, Yoshihiro Morimoto, Kiyoshi Yoneda
  • Patent number: 6731260
    Abstract: A sealing material is formed to cover a drain driver comprising a horizontal shift register and a sampling portion and its edge lines are linear on the horizontal shift register. Operation characteristics of TFT elements just below the sealing material are changed and are different from those of TFT elements of the area not below the sealing material. However, operation characteristics do not differ between phases of the shift register, and adverse effects for display can be prevented.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: May 4, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yushi Jinno, Kyoko Hirai