Abstract: There is provided a semiconductor device including a multi-gate transistor having a plurality of gates in a common active region, in which the multi-gate transistor has a comb-shaped metal structure in which a first metal is drawn out and bundled in a W length direction from contacts arranged in a single row in each of a source region and a drain region, and the multi-gate transistor has a wiring layout in which a root section of the first metal coincides immediately above an end of the source region and the drain region or is disposed inside the end of the source region and the drain region in the W length direction.

Abstract: Provided is a semiconductor apparatus which can achieve high reliability while reducing parasitic capacitance and can prevent a gate leakage defect while suppressing an increase in manufacturing costs. The semiconductor apparatus includes a substrate having a buried insulating film and a semiconductor layer provided on the buried insulating film and formed with a semiconductor element, a gate electrode provided on the semiconductor layer and having a wiring extending from a central portion of the semiconductor layer to each end portion of the semiconductor layer in a case where the substrate is viewed from above, a source contact via and a drain contact via which are provided on the semiconductor layer, and a protruding portion provided near an area where the end portion of the semiconductor layer intersects the wiring of the gate electrode, the protruding portion including a material identical to that of the semiconductor layer and protruding outward from a side surface of the semiconductor layer.

Abstract: There is provided a semiconductor device including a multi-gate transistor having a plurality of gates in a common active region, in which the multi-gate transistor has a comb-shaped metal structure in which a first metal is drawn out and bundled in a W length direction from contacts arranged in a single row in each of a source region and a drain region, and the multi-gate transistor has a wiring layout in which a root section of the first metal coincides immediately above an end of the source region and the drain region or is disposed inside the end of the source region and the drain region in the W length direction.