Abstract: The object of the present invention is to reliably prevent deterioration and failure of reception relevant parts in a transmission apparatus on a reception side without using an attenuator. An output value control method that controls an output value of output information transmitted from each of transmission apparatuses, in which a transmission apparatus transmits the output information having a minimum output value as the output value to the other transmission apparatus, and when the output information does not reach the other transmission apparatus, the transmission apparatus repeats transmission of the output information after increasing the own output value by adding a predetermined value to a previous output value, and then the other transmission apparatus that has received the output information calculates the output value of the transmission apparatus, and notifies the calculated output value of the transmission apparatus as an appropriate output value to the transmission apparatus.

Abstract: The object of the present invention is to reliably prevent deterioration and failure of reception relevant parts in a transmission apparatus on a reception side without using an attenuator. An output value control method that controls an output value of output information transmitted from each of transmission apparatuses, in which a transmission apparatus transmits the output information having a minimum output value as the output value to the other transmission apparatus, and when the output information does not reach the other transmission apparatus, the transmission apparatus repeats transmission of the output information after increasing the own output value by adding a predetermined value to a previous output value, and then the other transmission apparatus that has received the output information calculates the output value of the transmission apparatus, and notifies the calculated output value of the transmission apparatus as an appropriate output value to the transmission apparatus.

Abstract: A packet switch having a structure of writing a variable length packet received from each of input lines into a shared buffer memory on a fixed length data block unit basis, wherein a buffer controller forms an input queue for each input line and, when the last data block of a variable length packet is registered in the input queue, links a linked address list for the input queue to one or a plurality of output queues corresponding to one or a plurality of packet destination output lines.

Abstract: A packet switch which includes input line interfaces for converting variable length packets received from input lines to fixed length cells, a switch unit for switching said packets in cell units, output line interfaces for converting output cells from the switching unit to variable length packets and transmitting the variable length packets over output lines. Each of the input line interfaces has a cell output controller for queuing the fixed length cells for each output line according to the degree of priority of the cells, and for selectively outputting the stored cells in the queues in order of priority, thereby to suppress the transmission of cells with a low priority during the times of congestion.

Abstract: In a variable length switch for exchanging CPS-packets by AAL2, an effective variable length packet switch without limiting capacitance of a switching section is provided when the CPS-packets are loaded on an ATM cell and exchanged. An interface section receives the ATM cell in which the CPS-packets are multiplexed and packed, disassembles the received ATM cell and demultiplexes and unpacks the CPS-packets loaded on the ATM cell. When output paths of the plurality of the CPS-packets are identical, the CPS-packets are transferred by multiplexing and packing them in the same connection. In an interface 110-1 to 110-N on a transmission side, a cell transferred from the switching section 100 is disassembled, and the CPS-packet are multiplexed and packed in a cell corresponding to an output path of the CPS-packets.

Abstract: A method and a system for multiplexing voice packets without delay variation even if the number of multiplexed channels is increased, wherein a packet buffering unit receives compressed voice data, and stores voice data groups during voice activity intervals in each channel as talk; a scheduling FIFO block sequentially stores the channel numbers of a predetermined number of multiplexed channels which are read according to priority over the other channels, thereby controlling reading contention. A write decision block controls writing of talk spurts in the buffer areas of the respective channels in a packet buffering unit and also controls writing of the channel numbers in the scheduling FIFO block. A scheduling FIFO controller selects channel numbers from the scheduling FIFO block and a read decision block outputs voice packets by controlling the multiplexing sequence of talk spurts of the selected channel numbers.

Abstract: A packet switch having a structure of writing a variable length packet received from each of input lines into a shared buffer memory on a fixed length data block unit basis, wherein a buffer controller forms an input queue for each input line and, when the last data block of a variable length packet is registered in the input queue, links a linked address list for the input queue to one or a plurality of output queues corresponding to one or a plurality of packet destination output lines.