Patents by Inventor Yusuke AKADA

Yusuke AKADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260193988
    Abstract: A turbine blade including a blade wall and an insert inserted in a space formed inside the blade wall. Inside the insert, an inner cavity communicating with the outside of the turbine blade is formed. On the outer surface of the insert, a plurality of projections projecting toward the inner surface of the blade wall are formed. Between two adjacent projections among the plurality of projections, a collection space communicating with the outside of the turbine blade is defined. Formed in each of the plurality of projections are a flow path communicating with the inner cavity, and at least one cooling hole that is open so as to communicate with the flow path and face the inner surface of the blade wall.
    Type: Application
    Filed: November 24, 2023
    Publication date: July 9, 2026
    Inventors: Satoshi MIZUKAMI, Ryuta ITO, Shuji TANIGAWA, Atsuya SAKATA, Saki MATSUO, Yamato SHIRAMASA, Ryo TANAKA, Yusuke AKADA
  • Publication number: 20260103991
    Abstract: This intermediate shaft cover comprises: a cylindrical inner cover covering an intermediate rotor shaft; an annular outer cover which covers an outer peripheral side of a diffuser space and which is connected to a gas turbine casing; and a strut which extends radially outward from an outer periphery of the inner cover, and which is connected directly or indirectly to the outer cover. The strut has a thick-walled portion and a thin-walled portion having a circumferential-direction thickness that is less than that of the thick-walled portion. The thick-walled portion is formed in a region of the strut including an outer connecting portion connected directly or indirectly to the outer cover. The thin-walled portion is formed in a region of the strut including an inner connecting portion connected to the inner cover.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 16, 2026
    Inventors: Yusuke AKADA, Elichi TSUTSUMI, Ikko TSUBOKURA
  • Publication number: 20260005184
    Abstract: A semiconductor device includes: a wiring substrate including a first bonding pad and a second bonding pad aligned with the first bonding pad in a first direction; a semiconductor element provided on the wiring substrate; and a connection wiring connecting the first bonding pad to the semiconductor element and including a first bonding wire and a second bonding wire arranged in the first direction. The first bonding pad includes a region not connected to the connection wiring, the region being partitioned by a protrusion provided on a surface of the first bonding pad, and being partitioned in a non-perpendicular direction with respect to the first direction or physically partially partitioned.
    Type: Application
    Filed: March 10, 2025
    Publication date: January 1, 2026
    Applicant: Kioxia Corporation
    Inventor: Yusuke AKADA
  • Patent number: 12331662
    Abstract: A shroud of a vane of a turbine is provided. The shroud includes a shroud main body comprising a first wall having a gas-passage face facing a hot gas passage of the turbine and a cooling face facing opposite to the hot gas passage, a shroud edge disposed on a circumference of the shroud main body to surround the shroud main body, the shroud edge comprising a shroud edge passage therein, and an impingement box disposed to face the cooling face of the first wall so as to be spaced apart from the cooling face of the first wall. The impingement box comprises a cooling air inlet to introduce a cooling air from the shroud edge passage into an inside of the impingement box, and an impingement air hole configured to jet the introduced cooling air to the cooling face of the first wall to cool the cooling face of the first wall.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: June 17, 2025
    Assignee: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Satoshi Mizukami, David Allen Flodman, Satoshi Hada, Yasumasa Kunisada, Saki Matsuo, Ryo Tanaka, Takuro Kameda, Yusuke Akada
  • Publication number: 20250038135
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: October 11, 2024
    Publication date: January 30, 2025
    Applicant: KIOXIA CORPORATION
    Inventors: Yusuke AKADA, Rina KADOWAKI, Hiroyuki MAEDA
  • Patent number: 12132013
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: October 29, 2024
    Assignee: KIOXIA CORPORATION
    Inventors: Yusuke Akada, Rina Kadowaki, Hiroyuki Maeda
  • Publication number: 20240186296
    Abstract: A semiconductor device according to the present embodiment includes a substrate having a first surface, a first spacer and a second spacer, a first semiconductor chip, and a stacked body. The first semiconductor chip is provided on the first surface so as to be disposed between the first spacer and the second spacer. The stacked body is a stacked body that is provided above the first spacer, the second spacer, and the first semiconductor chip and in which a plurality of second semiconductor chips are stacked in a first direction. One of the second semiconductor chips, which is provided on the lowermost second semiconductor chip, is stacked with an offset relative to the lowermost second semiconductor chip in a second direction. A central position of the first semiconductor chip is separated from a central position of the lowermost second semiconductor chip in the second direction.
    Type: Application
    Filed: November 27, 2023
    Publication date: June 6, 2024
    Applicant: Kioxia Corporation
    Inventors: Akio WATANABE, Yusuke AKADA, Hideko MUKAIDA
  • Publication number: 20240159158
    Abstract: A shroud of a vane of a turbine is provided. The shroud includes a shroud main body comprising a first wall having a gas-passage face facing a hot gas passage of the turbine and a cooling face facing opposite to the hot gas passage, a shroud edge disposed on a circumference of the shroud main body to surround the shroud main body, the shroud edge comprising a shroud edge passage therein, and an impingement box disposed to face the cooling face of the first wall so as to be spaced apart from the cooling face of the first wall. The impingement box comprises a cooling air inlet to introduce a cooling air from the shroud edge passage into an inside of the impingement box, and an impingement air hole configured to jet the introduced cooling air to the cooling face of the first wall to cool the cooling face of the first wall.
    Type: Application
    Filed: November 16, 2022
    Publication date: May 16, 2024
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Satoshi Mizukami, David Allen Flodman, Satoshi Hada, Yasumasa Kunisada, Saki Matsuo, Ryo Tanaka, Takuro Kameda, Yusuke Akada
  • Publication number: 20230197641
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: February 21, 2023
    Publication date: June 22, 2023
    Applicant: KIOXIA CORPORATION
    Inventors: Yusuke AKADA, Rina KADOWAKI, Hiroyuki MAEDA
  • Patent number: 11610852
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: March 21, 2023
    Assignee: Kioxia Corporation
    Inventors: Yusuke Akada, Rina Kadowaki, Hiroyuki Maeda
  • Publication number: 20220051995
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: October 28, 2021
    Publication date: February 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Yusuke AKADA, Rina KADOWAKI, Hiroyuki MAEDA
  • Patent number: 11183469
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: November 23, 2021
    Assignee: Kioxia Corporation
    Inventors: Yusuke Akada, Rina Kadowaki, Hiroyuki Maeda
  • Patent number: 10748885
    Abstract: According to one embodiment, a semiconductor device comprises a first terminal on a first surface of a substrate and a first semiconductor chip on the first surface of the substrate and including a second terminal. A first connector electrically connects the first terminal to the second terminal. A second semiconductor chip is on the first surface of the substrate. An adhesive resin is between the second semiconductor chip and the first surface. A portion of the first connector is embedded in the adhesive resin. The first semiconductor chip is spaced from the adhesive resin in a direction parallel to the first surface.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: August 18, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yusuke Akada
  • Publication number: 20200185340
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: February 14, 2020
    Publication date: June 11, 2020
    Applicant: Kioxia Corporation
    Inventors: Yusuke AKADA, Rina KADOWAKI, Hiroyuki MAEDA
  • Publication number: 20200105734
    Abstract: According to one embodiment, a semiconductor device comprises a first terminal on a first surface of a substrate and a first semiconductor chip on the first surface of the substrate and including a second terminal. A first connector electrically connects the first terminal to the second terminal. A second semiconductor chip is on the first surface of the substrate. An adhesive resin is between the second semiconductor chip and the first surface. A portion of the first connector is embedded in the adhesive resin. The first semiconductor chip is spaced from the adhesive resin in a direction parallel to the first surface.
    Type: Application
    Filed: February 12, 2019
    Publication date: April 2, 2020
    Inventor: Yusuke AKADA
  • Publication number: 20200075508
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: January 23, 2019
    Publication date: March 5, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Yusuke AKADA
  • Patent number: 9349940
    Abstract: A semiconductor device includes a substrate, a magnetic shield plate, a semiconductor element, a sealing layer, and a magnetic shield film. The magnetic shield plate includes a plate portion disposed along the substrate, inclined portions extending in obliquely upward directions from opposite edges of the plate portion, and arcuate portions disposed at tip ends of the inclined portions. The semiconductor element is mounted on the plate portion. The sealing layer seals the semiconductor element and the plate portion and the inclined portions of the magnetic shield plate. At least a part of each of the arcuate portions is exposed on a surface of the sealing layer. The magnetic shield film covers an upper surface of the sealing layer and is in contact with each of the arcuate portions.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: May 24, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Goto, Yusuke Akada
  • Publication number: 20160079515
    Abstract: A semiconductor device includes a substrate, a magnetic shield plate, a semiconductor element, a sealing layer, and a magnetic shield film. The magnetic shield plate includes a plate portion disposed along the substrate, inclined portions extending in obliquely upward directions from opposite edges of the plate portion, and arcuate portions disposed at tip ends of the inclined portions. The semiconductor element is mounted on the plate portion. The sealing layer seals the semiconductor element and the plate portion and the inclined portions of the magnetic shield plate. At least a part of each of the arcuate portions is exposed on a surface of the sealing layer. The magnetic shield film covers an upper surface of the sealing layer and is in contact with each of the arcuate portions.
    Type: Application
    Filed: March 2, 2015
    Publication date: March 17, 2016
    Inventors: Yoshiaki GOTO, Yusuke AKADA
  • Patent number: 9209053
    Abstract: In a manufacturing method of a semiconductor device according to an embodiment, a plurality of semiconductor packages each including a semiconductor chip mounted on a wiring board and a sealing resin layer as objects to be processed, and a tray including a plurality of housing parts are prepared. A depressed portion having a non-penetrating shape or a penetrating shape is formed in the housing part. The semiconductor packages are disposed in the plural housing parts respectively. By sputtering a metal material on the semiconductor package housed in the tray, a conductive shield layer is formed.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: December 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki Goto, Takashi Imoto, Takeshi Watanabe, Yuusuke Takano, Yusuke Akada, Yuji Karakane, Yoshinori Okayama, Akihiko Yanagida
  • Publication number: 20150171056
    Abstract: In a manufacturing method of a semiconductor device of an embodiment, a plurality of semiconductor packages, as objects to be processed, each including a semiconductor chip mounted on a wiring board and a sealing resin layer, and a tray including a plurality of housing parts are prepared. The semiconductor packages are respectively disposed in the plurality of housing parts of the tray. A metal material is sputtered on the semiconductor packages disposed in the housing parts, to thereby form a conductive shield layer covering an upper surface and side surfaces of each of the sealing resin layers and at least a part of side surfaces of each of the wiring boards.
    Type: Application
    Filed: September 10, 2014
    Publication date: June 18, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki Goto, Takashi Imoto, Takeshi Watanabe, Yuusuke Takano, Yusuke Akada, Yuji Karakane, Yoshinori Okayama, Akihiko Yanagida