Patents by Inventor Yusuke AKADA

Yusuke AKADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230197641
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: February 21, 2023
    Publication date: June 22, 2023
    Applicant: KIOXIA CORPORATION
    Inventors: Yusuke AKADA, Rina KADOWAKI, Hiroyuki MAEDA
  • Patent number: 11610852
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: March 21, 2023
    Assignee: Kioxia Corporation
    Inventors: Yusuke Akada, Rina Kadowaki, Hiroyuki Maeda
  • Publication number: 20220051995
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: October 28, 2021
    Publication date: February 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Yusuke AKADA, Rina KADOWAKI, Hiroyuki MAEDA
  • Patent number: 11183469
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: November 23, 2021
    Assignee: Kioxia Corporation
    Inventors: Yusuke Akada, Rina Kadowaki, Hiroyuki Maeda
  • Patent number: 10748885
    Abstract: According to one embodiment, a semiconductor device comprises a first terminal on a first surface of a substrate and a first semiconductor chip on the first surface of the substrate and including a second terminal. A first connector electrically connects the first terminal to the second terminal. A second semiconductor chip is on the first surface of the substrate. An adhesive resin is between the second semiconductor chip and the first surface. A portion of the first connector is embedded in the adhesive resin. The first semiconductor chip is spaced from the adhesive resin in a direction parallel to the first surface.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: August 18, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yusuke Akada
  • Publication number: 20200185340
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: February 14, 2020
    Publication date: June 11, 2020
    Applicant: Kioxia Corporation
    Inventors: Yusuke AKADA, Rina KADOWAKI, Hiroyuki MAEDA
  • Publication number: 20200105734
    Abstract: According to one embodiment, a semiconductor device comprises a first terminal on a first surface of a substrate and a first semiconductor chip on the first surface of the substrate and including a second terminal. A first connector electrically connects the first terminal to the second terminal. A second semiconductor chip is on the first surface of the substrate. An adhesive resin is between the second semiconductor chip and the first surface. A portion of the first connector is embedded in the adhesive resin. The first semiconductor chip is spaced from the adhesive resin in a direction parallel to the first surface.
    Type: Application
    Filed: February 12, 2019
    Publication date: April 2, 2020
    Inventor: Yusuke AKADA
  • Publication number: 20200075508
    Abstract: A semiconductor device according to the present embedment includes a substrate having a first region provided with a semiconductor element and a second region provided from the first region to an end. A material film is provided above the first and second regions. A first metal film is provided on the material film in the second region or on the material film between the first region and the second region. A trench, which caves in toward the substrate from a surface of the material film in the first region and from a surface of the material film under the first metal film, is provided in the material film between the first metal film and the first region.
    Type: Application
    Filed: January 23, 2019
    Publication date: March 5, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Yusuke AKADA
  • Patent number: 9349940
    Abstract: A semiconductor device includes a substrate, a magnetic shield plate, a semiconductor element, a sealing layer, and a magnetic shield film. The magnetic shield plate includes a plate portion disposed along the substrate, inclined portions extending in obliquely upward directions from opposite edges of the plate portion, and arcuate portions disposed at tip ends of the inclined portions. The semiconductor element is mounted on the plate portion. The sealing layer seals the semiconductor element and the plate portion and the inclined portions of the magnetic shield plate. At least a part of each of the arcuate portions is exposed on a surface of the sealing layer. The magnetic shield film covers an upper surface of the sealing layer and is in contact with each of the arcuate portions.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: May 24, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Goto, Yusuke Akada
  • Publication number: 20160079515
    Abstract: A semiconductor device includes a substrate, a magnetic shield plate, a semiconductor element, a sealing layer, and a magnetic shield film. The magnetic shield plate includes a plate portion disposed along the substrate, inclined portions extending in obliquely upward directions from opposite edges of the plate portion, and arcuate portions disposed at tip ends of the inclined portions. The semiconductor element is mounted on the plate portion. The sealing layer seals the semiconductor element and the plate portion and the inclined portions of the magnetic shield plate. At least a part of each of the arcuate portions is exposed on a surface of the sealing layer. The magnetic shield film covers an upper surface of the sealing layer and is in contact with each of the arcuate portions.
    Type: Application
    Filed: March 2, 2015
    Publication date: March 17, 2016
    Inventors: Yoshiaki GOTO, Yusuke AKADA
  • Patent number: 9209053
    Abstract: In a manufacturing method of a semiconductor device according to an embodiment, a plurality of semiconductor packages each including a semiconductor chip mounted on a wiring board and a sealing resin layer as objects to be processed, and a tray including a plurality of housing parts are prepared. A depressed portion having a non-penetrating shape or a penetrating shape is formed in the housing part. The semiconductor packages are disposed in the plural housing parts respectively. By sputtering a metal material on the semiconductor package housed in the tray, a conductive shield layer is formed.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: December 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki Goto, Takashi Imoto, Takeshi Watanabe, Yuusuke Takano, Yusuke Akada, Yuji Karakane, Yoshinori Okayama, Akihiko Yanagida
  • Publication number: 20150171060
    Abstract: In a manufacturing method of a semiconductor device according to an embodiment, a plurality of semiconductor packages each including a semiconductor chip mounted on a wiring board and a sealing resin layer as objects to be processed, and a tray including a plurality of housing parts are prepared. A depressed portion having a non-penetrating shape or a penetrating shape is formed in the housing part. The semiconductor packages are disposed in the plural housing parts respectively. By sputtering a metal material on the semiconductor package housed in the tray, a conductive shield layer is formed.
    Type: Application
    Filed: September 10, 2014
    Publication date: June 18, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki GOTO, Takashi IMOTO, Takeshi WATANABE, Yuusuke TAKANO, Yusuke AKADA, Yuji KARAKANE, Yoshinori OKAYAMA, Akihiko YANAGIDA
  • Publication number: 20150171056
    Abstract: In a manufacturing method of a semiconductor device of an embodiment, a plurality of semiconductor packages, as objects to be processed, each including a semiconductor chip mounted on a wiring board and a sealing resin layer, and a tray including a plurality of housing parts are prepared. The semiconductor packages are respectively disposed in the plurality of housing parts of the tray. A metal material is sputtered on the semiconductor packages disposed in the housing parts, to thereby form a conductive shield layer covering an upper surface and side surfaces of each of the sealing resin layers and at least a part of side surfaces of each of the wiring boards.
    Type: Application
    Filed: September 10, 2014
    Publication date: June 18, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki Goto, Takashi Imoto, Takeshi Watanabe, Yuusuke Takano, Yusuke Akada, Yuji Karakane, Yoshinori Okayama, Akihiko Yanagida
  • Publication number: 20110304050
    Abstract: According to one embodiment, a semiconductor apparatus includes a substrate, a first semiconductor device, a circuit pattern, and a potential unit. The substrate includes a first insulating layer and a second insulating layer stacked with the first insulating layer. The first semiconductor device is provided on a side of the first insulating layer opposite to the second insulating layer side. The circuit pattern is provided between the first insulating layer and the second insulating layer. The potential unit is provided between the first insulating layer and the second insulating layer. The potential unit is connected to ground or a power source.
    Type: Application
    Filed: February 22, 2011
    Publication date: December 15, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takashi IMOTO, Yusuke AKADA, Masaji RI, Tetsuya SATO