Patents by Inventor Yusuke Etou

Yusuke Etou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8349656
    Abstract: In order to remove plating burrs generated in etching step, there is provided a manufacturing method of semiconductor devices on each of unit leadframes in a leadframe material in which a plurality of the unit leadframes are arranged in plural rows or a single row, wherein at least two types of plating burr removals are conducted after a half-etching is performed onto a front surface side of the leadframe material, using a first plating layer as resist film.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: January 8, 2013
    Assignee: Mitsui High-Tec, Inc.
    Inventors: Yusuke Etou, Naoki Fukami, Kiyoshi Matsunaga
  • Publication number: 20110059577
    Abstract: In order to remove plating burrs generated in etching step, there is provided a manufacturing method of semiconductor devices on each of unit leadframes in a leadframe material in which a plurality of the unit leadframes are arranged in plural rows or a single row, wherein at least two types of plating burr removals are conducted after a half-etching is performed onto a front surface side of the leadframe material, using a first plating layer as resist film.
    Type: Application
    Filed: September 8, 2010
    Publication date: March 10, 2011
    Applicant: MITSUI HIGH-TECH, INC.
    Inventors: Yusuke ETOU, Naoki FUKAMI, Kiyoshi MATSUNAGA