Patents by Inventor Yusuke FUNAYA

Yusuke FUNAYA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220327164
    Abstract: Provided is a data processing assistant system, a data processing assistant method, and a data processing assistant program. The data processing assistant system includes: a processing record accumulation unit that accumulates processing records in which one or more pieces of data, data processing performed using the data, and a processing result of the data processing are associated with each other; a correspondence relation data creation unit that creates, based on the processing records, correspondence relation data indicative of a correspondence relation among a data type indicating a type of the data, a question to be solved by the data processing, and the processing result; and a processing information presentation unit that presents, upon receiving designation of the data type and the question, information related to appropriate data processing based on the correspondence relation data.
    Type: Application
    Filed: March 11, 2021
    Publication date: October 13, 2022
    Applicant: Hitachi, Ltd.
    Inventors: Mika Takata, Norifumi Nishikawa, Rikiya Tajiri, Yusuke Funaya, Toshihiko Kashiyama
  • Publication number: 20220230119
    Abstract: A computer has: a testing unit obtaining attribute values of attributes from an object to which a measure is implemented and an object to which the measure is not implemented, and calculating a change amount of the attribute values of the attributes due to the implementation of the measure and a test indicator for determining a significant difference of the change amount of the attribute values of the attributes due to the implementation of the measure; an experimental rule updating unit calculating a cumulative change amount indicating a temporal change amount of the attribute values of the attributes and a cumulative test indicator indicating a temporal test indicator of the attributes on the basis of a test result output from the testing unit, and accumulating data in which the identification information of the measure and the cumulative change amount and the cumulative test indicator are associated; and a display unit.
    Type: Application
    Filed: September 8, 2021
    Publication date: July 21, 2022
    Inventors: Yuxin LIANG, Masashi EGI, Yusuke FUNAYA, Masakazu TAKAHASHI
  • Patent number: 11102299
    Abstract: A data processing system includes a plurality of computers which include a processor and a memory, a storage device which is connected to the plurality of computers to store data, and a management computer controls the plurality of computers. The computer includes a node pool which can perform, stop, and delete one or more nodes. The node pool includes one or more first nodes which function as a data buffer. The management computer causes the node to measure a performance of data transmission between the data buffer and the storage device, determines a number of increased/decreased nodes on the basis of a measurement result of the performance, and notifies the node pool of a command of performing or deleting the first node according to the determined number of increased/decreased nodes. The node pool adjusts a number of the first nodes according to performing or deleting command.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: August 24, 2021
    Assignee: HITACHI, LTD.
    Inventors: Hirofumi Inomata, Yusuke Funaya, Tetsuro Honmura
  • Patent number: 10599510
    Abstract: A computer system comprises a computer being coupled to a device via a device interface. The device interface has an error status register and a link status register. An error isolation unit periodically obtains values of the error status register and the link status register. The error isolation unit determine whether an error occurs in the device; determine whether the error is an error to be isolated; determine whether the error is an error to be isolated based on values of the error status register and the link status register re-obtained after elapse of a predetermined time in a case of determining the error is not to be isolated. The error isolation unit detects the error as an error of a protocol caused by stop of a power supply in a case of determining the error is to be isolated.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: March 24, 2020
    Assignee: HITACHI, LTD.
    Inventors: Ken Sugimoto, Yusuke Funaya
  • Publication number: 20190173949
    Abstract: A data processing system includes a plurality of computers which include a processor and a memory, a storage device which is connected to the plurality of computers to store data, and a management computer controls the plurality of computers. The computer includes a node pool which can perform, stop, and delete one or more nodes. The node pool includes one or more first nodes which function as a data buffer. The management computer causes the node to measure a performance of data transmission between the data buffer and the storage device, determines a number of increased/decreased nodes on the basis of a measurement result of the performance, and notifies the node pool of a command of performing or deleting the first node according to the determined number of increased/decreased nodes. The node pool adjusts a number of the first nodes according to performing or deleting command.
    Type: Application
    Filed: March 22, 2017
    Publication date: June 6, 2019
    Applicant: HITACHI, LTD.
    Inventors: Hirofumi INOMATA, Yusuke FUNAYA, Tetsuro HONMURA
  • Publication number: 20180189126
    Abstract: A computer system comprises a computer being coupled to a device via a device interface. The device interface has an error status register and a link status register. An error isolation unit periodically obtains values of the error status register and the link status register. The error isolation unit determine whether an error occurs in the device; determine whether the error is an error to be isolated; determine whether the error is an error to be isolated based on values of the error status register and the link status register re-obtained after elapse of a predetermined time in a case of determining the error is not to be isolated. The error isolation unit detects the error as an error of a protocol caused by stop of a power supply in a case of determining the error is to be isolated.
    Type: Application
    Filed: July 8, 2015
    Publication date: July 5, 2018
    Inventors: Ken SUGIMOTO, Yusuke FUNAYA
  • Patent number: 9703717
    Abstract: A computer system according to the present invention is composed of a server 200 having a flash memory drive 204 for cache, a storage system 260 having storage tiers composed of an SSD 267 and an HDD 268, and a management server having a page tier determination program 503 for determining the storage tier to which data is to be stored. The page tier determination program 503 migrates data having a high read access rate out of the pages having a high cache rate to the flash memory drive 204 to a storage tier of the HDD 268, and confirms so that data is not stored in a duplicated manner to the flash memory drive 204 and the SSD 267. Further, the data having a relatively high write access rate is migrated to the storage tier of the SSD 267 so as to prevent deterioration of write process performance.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: July 11, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Hayashi, Yusuke Funaya
  • Publication number: 20160132433
    Abstract: A computer system according to the present invention is composed of a server 200 having a flash memory drive 204 for cache, a storage system 260 having storage tiers composed of an SSD 267 and an HDD 268, and a management server having a page tier determination program 503 for determining the storage tier to which data is to be stored. The page tier determination program 503 migrates data having a high read access rate out of the pages having a high cache rate to the flash memory drive 204 to a storage tier of the HDD 268, and confirms so that data is not stored in a duplicated manner to the flash memory drive 204 and the SSD 267. Further, the data having a relatively high write access rate is migrated to the storage tier of the SSD 267 so as to prevent deterioration of write process performance.
    Type: Application
    Filed: July 29, 2013
    Publication date: May 12, 2016
    Inventors: Shinichi HAYASHI, Yusuke FUNAYA
  • Publication number: 20150363128
    Abstract: A management system manages at least a storage system. The management system decides two or more logical storage devices configuring a logical volume to be provided to an application. The management system decides two or more MPs that undertake processes on the two or more logical storage devices, respectively. The management system allocates the decided two or more MPs to the decided two or more logical storage devices such that one MP is allocated to one logical storage device.
    Type: Application
    Filed: March 18, 2013
    Publication date: December 17, 2015
    Applicant: Hitachi, Ltd.
    Inventors: Yusuke FUNAYA, Kazuhide AIKOH, Keisuke HATASAKI, Akihisa NAGAMI