Patents by Inventor Yusuke GOZU
Yusuke GOZU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12160954Abstract: A wiring board includes a wiring layer, an insulating layer, a plurality of opening portions, and a connection terminal. The insulating layer is laminated on the wiring layer and covers a wiring pattern. Each of the plurality of opening portions penetrates through the insulating layer to the wiring pattern. The connection terminal is formed on the respective opening portions and comes into contact with the upper surface of the wiring pattern. The wiring layer includes a first wiring pattern, and a second wiring pattern that is formed of a plurality of laminated metal layers and that is thicker than the first wiring pattern. An upper surface of a metal layer serving as an uppermost layer of the second wiring pattern is a contact surface with the connection terminal and has a same width as an upper surface of a metal layer serving as a layer other than the uppermost layer.Type: GrantFiled: July 14, 2022Date of Patent: December 3, 2024Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yusuke Gozu
-
Publication number: 20230026366Abstract: A wiring board includes a wiring layer, an insulating layer, a plurality of opening portions, and a connection terminal. The insulating layer is laminated on the wiring layer and covers a wiring pattern. Each of the plurality of opening portions penetrates through the insulating layer to the wiring pattern. The connection terminal is formed on the respective opening portions and comes into contact with the upper surface of the wiring pattern. The wiring layer includes a first wiring pattern, and a second wiring pattern that is formed of a plurality of laminated metal layers and that is thicker than the first wiring pattern. An upper surface of a metal layer serving as an uppermost layer of the second wiring pattern is a contact surface with the connection terminal and has a same width as an upper surface of a metal layer serving as a layer other than the uppermost layer.Type: ApplicationFiled: July 14, 2022Publication date: January 26, 2023Inventor: Yusuke Gozu
-
Patent number: 10366949Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.Type: GrantFiled: January 10, 2018Date of Patent: July 30, 2019Assignee: Shinko Electric Industries Co., Ltd.Inventors: Noriyoshi Shimizu, Yusuke Gozu, Jun Furuichi, Akio Rokugawa, Takashi Ito
-
Patent number: 10262946Abstract: A wiring substrate includes a first wiring structure and a second wiring structure having a higher wiring density. The second wiring structure includes a wiring layer formed on a first insulation layer of the first wiring structure. The wiring layer includes a first wiring pattern, the upper surface of which includes smooth and rough surfaces. A protective film, formed from a conductive material having a higher migration resistance than the wiring layer, covers only the smooth surface and includes a smooth upper surface. A second insulation layer stacked on the first insulation layer covers the wiring layer and the protective film. The smooth surface is continuous with and downwardly recessed from the smooth surface to expose a peripheral portion of the protective film. The second insulation layer covers upper, lower, and side surfaces of the peripheral portion.Type: GrantFiled: August 24, 2017Date of Patent: April 16, 2019Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yusuke Gozu, Yuta Sakaguchi, Norikazu Nakamura, Noriyoshi Shimizu
-
Patent number: 10028393Abstract: A wiring substrate includes a core layer, a first wiring layer, a first insulating layer, a first via wiring, a second wiring layer, a second insulating layer, a second via wiring, a third wiring layer, a third insulating layer, a third via wiring, and a through-wiring. The through-wiring includes upper and lower end surfaces. The upper end surface has an area that is smaller than an area of the lower end surface. The upper surface of the first insulating layer is more flat than the lower surface of the third insulating layer. The second wiring layer has a wiring density that is higher than a wiring density of the first wiring layer.Type: GrantFiled: July 2, 2015Date of Patent: July 17, 2018Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Noriyoshi Shimizu, Yusuke Gozu, Akio Rokugawa
-
Publication number: 20180166372Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.Type: ApplicationFiled: January 10, 2018Publication date: June 14, 2018Inventors: Noriyoshi SHIMIZU, Yusuke GOZU, Jun FURUICHI, Akio ROKUGAWA, Takashi Ito
-
Patent number: 9961760Abstract: A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.Type: GrantFiled: April 18, 2017Date of Patent: May 1, 2018Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yusuke Gozu, Yuta Sakaguchi, Noriyoshi Shimizu
-
Publication number: 20180061765Abstract: A wiring substrate includes a first wiring structure and a second wiring structure having a higher wiring density. The second wiring structure includes a wiring layer formed on a first insulation layer of the first wiring structure. The wiring layer includes a first wiring pattern, the upper surface of which includes smooth and rough surfaces. A protective film, formed from a conductive material having a higher migration resistance than the wiring layer, covers only the smooth surface and includes a smooth upper surface. A second insulation layer stacked on the first insulation layer covers the wiring layer and the protective film. The smooth surface is continuous with and downwardly recessed from the smooth surface to expose a peripheral portion of the protective film. The second insulation layer covers upper, lower, and side surfaces of the peripheral portion.Type: ApplicationFiled: August 24, 2017Publication date: March 1, 2018Inventors: YUSUKE GOZU, YUTA SAKAGUCHI, NORIKAZU NAKAMURA, NORIYOSHI SHIMIZU
-
Patent number: 9875957Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.Type: GrantFiled: July 6, 2015Date of Patent: January 23, 2018Assignee: Shinko Electric Industries Co., Ltd.Inventors: Noriyoshi Shimizu, Yusuke Gozu, Jun Furuichi, Akio Rokugawa, Takashi Ito
-
Publication number: 20170359891Abstract: A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.Type: ApplicationFiled: April 18, 2017Publication date: December 14, 2017Inventors: Yusuke GOZU, Yuta SAKAGUCHI, Noriyoshi SHIMIZU
-
Patent number: 9741652Abstract: A wiring substrate includes a wiring layer on a projection of an insulating layer. The wiring layer includes a first metal layer on an end face of the projection with a peripheral portion of the end face exposed, a second metal layer that is on the first metal layer and wider than the end face, and a third metal layer. The second metal layer includes first and second opposite surfaces with the second surface on the first metal layer with a peripheral portion thereof exposed. The third metal layer covers side surfaces of the first metal layer, and the first surface, the peripheral portion of the second surface, and side surfaces of the second metal layer, and fills in a region where the end face and the peripheral portion of the second surface face each other. The materials of the second and third metal layers are different.Type: GrantFiled: April 17, 2017Date of Patent: August 22, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO. LTD.Inventors: Yuta Sakaguchi, Yusuke Gozu, Noriyoshi Shimizu
-
Publication number: 20160020163Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.Type: ApplicationFiled: July 6, 2015Publication date: January 21, 2016Inventors: Noriyoshi SHIMIZU, Yusuke GOZU, Jun FURUICHI, Akio ROKUGAWA, Takashi Ito
-
Publication number: 20160007460Abstract: A wiring substrate includes a core layer, a first wiring layer, a first insulating layer, a first via wiring, a second wiring layer, a second insulating layer, a second via wiring, a third wiring layer, a third insulating layer, a third via wiring, and a through-wiring. The through-wiring includes upper and lower end surfaces. The upper end surface has an area that is smaller than an area of the lower end surface. The upper surface of the first insulating layer is more flat than the lower surface of the third insulating layer. The second wiring layer has a wiring density that is higher than a wiring density of the first wiring layer.Type: ApplicationFiled: July 2, 2015Publication date: January 7, 2016Inventors: Noriyoshi SHIMIZU, Yusuke GOZU, Akio ROKUGAWA