Patents by Inventor Yusuke Harada

Yusuke Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230408547
    Abstract: An object of the present invention is to provide a multilayer wiring substrate for probe card capable of preventing deterioration of a thin film resistor 30.
    Type: Application
    Filed: November 17, 2020
    Publication date: December 21, 2023
    Applicant: Japan Electronic Materials Corporation
    Inventors: Satoshi ABE, Tetsuo FUJIMOTO, Yusuke HARADA, Shinya HORI
  • Publication number: 20230207444
    Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.
    Type: Application
    Filed: February 17, 2023
    Publication date: June 29, 2023
    Inventors: Yusuke HARADA, Mamoru YAMAGAMI
  • Patent number: 11616009
    Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: March 28, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Yusuke Harada, Mamoru Yamagami
  • Publication number: 20230083920
    Abstract: A semiconductor device includes an electrically insulating substrate including a substrate main surface and a substrate back surface facing opposite to each other in a thickness direction and at least one substrate side surface facing a direction intersecting the thickness direction, a semiconductor element arranged at a side of the substrate main surface, a heat-dissipating conductive portion that is provided at a position overlapping with at least a portion of the semiconductor element when viewed from the thickness direction and is exposed from the substrate back surface, a sealing resin that seals the semiconductor element while covering the substrate main surface, and at least one wiring portion that is connected to the heat-dissipating conductive portion, extends from the heat-dissipating conductive portion to the substrate side surface while being exposed from the substrate back surface, and is exposed from the substrate side surface.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 16, 2023
    Inventors: Yusuke HARADA, Hiroyuki SHINKAI
  • Publication number: 20210225755
    Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.
    Type: Application
    Filed: April 8, 2021
    Publication date: July 22, 2021
    Inventors: Yusuke HARADA, Mamoru YAMAGAMI
  • Patent number: 11004782
    Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: May 11, 2021
    Assignee: ROHM CO., LTD.
    Inventors: Yusuke Harada, Mamoru Yamagami
  • Publication number: 20190287890
    Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 19, 2019
    Inventors: Yusuke HARADA, Mamoru YAMAGAMI
  • Patent number: 10354936
    Abstract: An electronic component includes a substrate having a principal surface, a chip arranged at the principal surface of the substrate, a sealing resin sealing the chip on the principal surface of the substrate, and a heat dissipation member formed on the sealing resin.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: July 16, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Yusuke Harada, Yasuhiro Fuwa
  • Publication number: 20180019177
    Abstract: An electronic component includes a substrate having a principal surface, a chip arranged at the principal surface of the substrate, a sealing resin sealing the chip on the principal surface of the substrate, and a heat dissipation member formed on the sealing resin.
    Type: Application
    Filed: July 11, 2017
    Publication date: January 18, 2018
    Applicant: ROHM CO., LTD.
    Inventors: Yusuke HARADA, Yasuhiro FUWA
  • Patent number: 8786087
    Abstract: A semiconductor device is made up of a first insulating layer having a through hole; a first interconnection which includes a first conductive layer, a first barrier layer, and a first main interconnection, and a second interconnection connected to one of the first conductive layer and the first barrier layer. Accordingly, the semiconductor device can avoid a problem where the material of the first main interconnection transfers from a portion connected to the second interconnection due to electromigration to form a void, with the result that the first interconnection is disconnected from the second interconnection.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: July 22, 2014
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yusuke Harada
  • Publication number: 20120312437
    Abstract: A tread portion of a motorcycle is on each side of the tire equator with main oblique grooves. The main oblique groove has an axially inner end at a axial distance from the tire equator, extends axially outwardly beyond the side edge of the narrow width ply of the breaker, terminates within the tread portion, and comprises an axially inner oblique segment extending axially outwardly from the axially inner end, while inclining to a tire circumferential direction at a smaller angle with respect to the tire circumferential direction, and an axially outer oblique segment extending from the axially inner oblique segment, while inclining to the tire circumferential direction at a larger angle with respect to the tire circumferential direction to form a bent point. The developed axial distance from the bent point to the narrow width ply side edge is not more than 10% of the developed tread width.
    Type: Application
    Filed: May 25, 2012
    Publication date: December 13, 2012
    Inventor: Yusuke HARADA
  • Publication number: 20100270675
    Abstract: A semiconductor device is made up of a first insulating layer having a through hole; a first interconnection which includes a first conductive layer, a first barrier layer, and a first main interconnection, and a second interconnection connected to one of the first conductive layer and the first barrier layer. Accordingly, the semiconductor device can avoid a problem where the material of the first main interconnection transfers from a portion connected to the second interconnection due to electromigration to form a void, with the result that the first interconnection is disconnected from the second interconnection.
    Type: Application
    Filed: July 2, 2010
    Publication date: October 28, 2010
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventor: Yusuke Harada
  • Patent number: 7777337
    Abstract: A semiconductor device includes a first insulating layer having a through hole; a first interconnection having a first conductive layer, a first barrier layer, and a first main interconnection; and a second interconnection connected to one of the first conductive layer and the first barrier layer. Accordingly, a problem wherein copper in the first main interconnection transfers from a connection portion thereof to the second interconnection due to electromigration, so that a void is formed at the connected portion resulting in the first interconnection being disconnected from the second interconnection, can be prevented.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: August 17, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yusuke Harada
  • Patent number: 7176577
    Abstract: A semiconductor device is made up of a first insulating layer having a through hole; a first interconnection which comprises a first conductive layer, a first barrier layer, and a first main interconnection, and a second interconnection connected to one of the fist conductive layer and the first barrier layer. Accordingly, the semiconductor device can avoid a problem so that the Cu of the first main interconnection transfers from a portion connected to the second interconnection due to cause electromigration, the connected portion becomes a void, and the first interconnection is disconnected to the second interconnection.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: February 13, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yusuke Harada
  • Patent number: 7126222
    Abstract: A semiconductor device is made up of a first insulating layer having a through hole; a first interconnection which comprises a first conductive layer, a first barrier layer, and a first main interconnection, and a second interconnection connected to one of the first conductive layer and the first barrier layer. Accordingly, the semiconductor device can avoid a problem so that the Cu of the first main interconnection transfers from a portion connected to the second interconnection due to cause electromigration, the connected portion becomes a void, and the first interconnection is disconnected to the second interconnection.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: October 24, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yusuke Harada
  • Patent number: 6924176
    Abstract: A conductive layer which is formed on an insulative layer on a semiconductor substrate is connected to the semiconductor substrate via a through portion which passes through the insulative layer and reaches the semiconductor substrate. In a state where the conductive layer is electrically connected to the semiconductor substrate via the through portion, a patterning process using a plasma etching is performed on the conductive layer, thereby forming a conductive path. After the formation of the conductive path, a heating process is performed on the substrate or the conductive path in order to disconnect the electrical connection between the through portion and the substrate by a reaction between the through portion and the semiconductor substrate which is in contact therewith.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: August 2, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Toru Yoshie, Kazuhide Abe, Yusuke Harada
  • Publication number: 20050110100
    Abstract: A semiconductor device is made up of a first insulating layer having a through hole; a first interconnection which comprises a first conductive layer, a first barrier layer, and a first main interconnection, and a second interconnection connected to one of the first conductive layer and the first barrier layer. Accordingly, the semiconductor device can avoid a problem so that the Cu of the first main interconnection transfers from a portion connected to the second interconnection due to cause electromigration, the connected portion becomes a void, and the first interconnection is disconnected to the second interconnection.
    Type: Application
    Filed: December 14, 2004
    Publication date: May 26, 2005
    Inventor: Yusuke Harada
  • Publication number: 20050098889
    Abstract: A semiconductor device is made up of a first insulating layer having a through hole; a first interconnection which comprises a first conductive layer, a first barrier layer, and a first main interconnection, and a second interconnection connected to one of the fist conductive layer and the first barrier layer. Accordingly, the semiconductor device can avoid a problem so that the Cu of the first main interconnection transfers from a portion connected to the second interconnection due to cause electromigration, the connected portion becomes a void, and the first interconnection is disconnected to the second interconnection.
    Type: Application
    Filed: December 14, 2004
    Publication date: May 12, 2005
    Inventor: Yusuke Harada
  • Patent number: 6780764
    Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate, forming an insulating film having a opening, forming a titanium film so as to extend from the semiconductor substrate in the opening to the insulating film surface, plasma treating the titanium film with a mixed gas of hydrogen and nitrogen; and forming a titanium nitride on the titanium film. Accordingly, the method can decrease a contact resistance of the tungsten interconnection in a contact hole.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: August 24, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Tomoyuki Morita, Yusuke Harada
  • Patent number: 6767812
    Abstract: Before deposition of a CVD titanium film on a cobalt silicide layer, an element which reacts with titanium is provided in the cobalt silicide layer in advance. Thereafter, the CVD titanium film is deposited on the cobalt silicide using a titanium tetrachloride gas.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: July 27, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kazuhide Abe, Yusuke Harada