Patents by Inventor Yusuke Igarashi

Yusuke Igarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020050397
    Abstract: A first metal film 14 made of a Cu plated film is formed on a radiation substrate 13A made of Al, and an island 15 exposed from a back surface of a semiconductor device 10 is adhered thereto. At that time, the back surface of the semiconductor device 10 is brought into contact with contact areas, and a first opening portion OP is opened larger than an arranging area of the semiconductor device 10. Accordingly, the cleaning can be executed via the first opening portion OP exposed from peripheries of the semiconductor device 10. In addition, the heat generated from semiconductor elements 16 can be radiated excellently from the island 15 via a second supporting member 13A.
    Type: Application
    Filed: March 16, 2001
    Publication date: May 2, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020048828
    Abstract: AS conductive patterns 11A to 11D are formed burying in a insulating resin 10 and a conductive foil 20 is formed being half-etched, thickness of the device is made thin. As an electrode for radiation 11D is provided, a semiconductor device superior in radiation is provided.
    Type: Application
    Filed: March 16, 2001
    Publication date: April 25, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020041023
    Abstract: A heat radiation electrode (15) is exposed from the back surface of an insulating resin (13), and a metal plate (23) is affixed to this heat radiation electrode (15). The back surface of this metal plate (23) and the back surface of a first supporting member (11) are substantially within a same plane, so that it is readily affixed to a second supporting member (24). Accordingly, the heat generated by the semiconductor chip can be efficiently dissipated via the heat radiation electrode (15), the metal plate (23) and the second supporting member (24).
    Type: Application
    Filed: March 16, 2001
    Publication date: April 11, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020041021
    Abstract: The back surface of a semiconductor chip (16) is exposed from the back surface of an insulating resin (13), and a metal plate (23) is affixed to this semiconductor chip (16). The back surface of this metal plate (23) and the back surface of a first supporting member (11) are substantially within a same plane, so that it is readily affixed to a second supporting member (24). Accordingly, the heat generated by the semiconductor chip can be efficiently dissipated via the metal plate (23) and the second supporting member (24).
    Type: Application
    Filed: March 16, 2001
    Publication date: April 11, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020041012
    Abstract: A heat radiation electrode (15) is exposed from the back surface of an insulating resin (13), and a metal plate (23) is affixed to the heat radiation electrode (15). The back surface of this metal plate (23) and the back surface of a first supporting member (11) are substantially within a same plane, so that it is readily affixed to a second supporting member (24). Accordingly, the heat generated by the semiconductor chip can be efficiently dissipated via the heat radiation electrode (15), the metal plate (23) and the second supporting member (24).
    Type: Application
    Filed: March 16, 2001
    Publication date: April 11, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020041022
    Abstract: The FCA to which the read/write amplifier IC is adhered is mounted in the hard disk. The first metal film formed by Cu plating is formed on the second supporting member 13 made of Al, and the metal body 15 exposed on the back surface of the semiconductor device 10 is adhered.
    Type: Application
    Filed: March 16, 2001
    Publication date: April 11, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020027290
    Abstract: AS conductive patterns 11A to 11D are formed burying in a insulating resin 10 and a conductive foil 20 is formed being half-etched, thickness of the device is made thin. As an electrode for radiation 11D is provided, a semiconductor device superior in radiation is provided.
    Type: Application
    Filed: March 16, 2001
    Publication date: March 7, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020027298
    Abstract: AS conductive patterns 11A to 11D are formed burying in a insulating resin 10 and a conductive foil 20 is formed being half-etched, thickness of the device is made thin. As an electrode for radiation 11D is provided, a semiconductor device superior in radiation is provided. Thickness of an electric connection means SD is substantially made definite as the electric connection means SD does not flow to a conductive path 11B by using a flow-prevention film DM.
    Type: Application
    Filed: March 16, 2001
    Publication date: March 7, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020028525
    Abstract: After mounting portions (65) are formed in each block (62), circuit elements are mounted on the mounting portions (65) and molded with insulating resin (50). Then, the back surface of conductive foil (60) is etched to form conductive patterns 51in each block. Further, a plurality of blocks are bonded onto a adhesive sheet so that a testing step and a dicing step are carried out upon the blocks in a lump.
    Type: Application
    Filed: August 31, 2001
    Publication date: March 7, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Patent number: 5469131
    Abstract: A resistive body of a hybrid integrated circuit has a resistance pattern on a resin film. Bonding pads permit connection of current through the resistance pattern. The resistance pattern may form part of a detecting bridge for overcurrent detection. One embodiment of the invention uses a rectangular resistance pattern with an opening in the center to force current to flow on a perimeter path for minimizing maximum temperature. Another embodiment uses a serpentine resistance pattern. A face-down resistance patter reduces interference. A direct-connection bonding pad reduces the voltage generated in a parasitic capacitance to improve the resistance of the resin film to voltage breakdown.
    Type: Grant
    Filed: August 30, 1993
    Date of Patent: November 21, 1995
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Ryoichi Takahashi, Katsumi Okawa, Yusuke Igarashi