Patents by Inventor Yusuke Isozumi

Yusuke Isozumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Capacitor arrangement assisting method and capacitor arrangement assisting device
    Patent number: 9117049
    Abstract: A capacitor arrangement assisting method wherein data entered by a user, such as the width w of a power supply wiring, the thickness h of a dielectric between the power supply wiring and a ground plane, the ESLcap of a capacitor, and a target frequency fT and a target impedance ZT of an IC, are received, the maximum allowable wiring length lmax of the power supply wiring is calculated on the basis of the received width w of the power supply wiring, the thickness h of the dielectric, the ESLcap of the capacitor, and the target impedance ZT of the IC at the target frequency fT, and the calculated maximum allowable wiring length lmax is displayed.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: August 25, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hidetoshi Yamamoto, Yusuke Isozumi, Kota Saito
  • CAPACITOR ARRANGEMENT ASSISTING METHOD AND CAPACITOR ARRANGEMENT ASSISTING DEVICE
    Publication number: 20150046896
    Abstract: A capacitor arrangement assisting method wherein data entered by a user, such as the width w of a power supply wiring, the thickness h of a dielectric between the power supply wiring and a ground plane, the ESLcap of a capacitor, and a target frequency fT and a target impedance ZT of an IC, are received, the maximum allowable wiring length lmax of the power supply wiring is calculated on the basis of the received width w of the power supply wiring, the thickness h of the dielectric, the ESLcap of the capacitor, and the target impedance ZT of the IC at the target frequency fT, and the calculated maximum allowable wiring length lmax is displayed.
    Type: Application
    Filed: October 23, 2014
    Publication date: February 12, 2015
    Inventors: Hidetoshi Yamamoto, Yusuke Isozumi, Kota Saito
  • Capacitor arrangement assisting method and capacitor arrangement assisting device
    Patent number: 8910106
    Abstract: A capacitor arrangement assisting method wherein data entered by a user, such as the width w of a power supply wiring, the thickness h of a dielectric between the power supply wiring and a ground plane, the ESLcap of a capacitor, and a target frequency fT and a target impedance ZT of an IC, are received, the maximum allowable wiring length lmax of the power supply wiring is calculated on the basis of the received width w of the power supply wiring, the thickness h of the dielectric, the ESLcap of the capacitor, and the target impedance ZT of the IC at the target frequency fT, and the calculated maximum allowable wiring length lmax is displayed.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: December 9, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hidetoshi Yamamoto, Yusuke Isozumi, Kota Saito