Patents by Inventor Yusuke KAJI
Yusuke KAJI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240075794Abstract: A vehicle door device includes first and second link arms each including a first pivotal connection point to a vehicle body and a second pivotal connection point to a door of a vehicle, and a drive unit that opens and closes the door based on an operation of a link mechanism formed by the first and second link arms by using at least one of the first and second link arms as a drive link and pivoting the drive link. The drive unit includes an actuator that outputs drive torque, and a transmission mechanism that transmits the drive torque to the drive link disposed at a position separated from the actuator. The transmission mechanism includes a torque input portion that inputs the drive torque to the drive link, and a power transmission member that forms a transmission path for the drive torque in a state of extending between the actuator and the torque input portion and has flexibility to enable transmission of the drive torque in a bent state.Type: ApplicationFiled: August 17, 2023Publication date: March 7, 2024Applicant: AISIN CORPORATIONInventors: Jueru SHIMIZU, Yosuke KAJI, Yusuke KAJINO, Manabu MURAI
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Patent number: 11837514Abstract: According to an aspect of the first disclosure, a semiconductor device includes a base plate, a case that surrounds a region immediately above the base plate, a semiconductor chip provided in the region, a sealing resin that fills the region and a barrier layer provided on the sealing resin, wherein the barrier layer has a first surface facing the base plate, a second surface opposite to the first surface, and a convex part protruding upward from the second surface, the first surface has a longer distance to the base plate as getting farther from the center, the convex part is provided avoiding the center, and a height of the convex part is greater than a distance in a thickness direction of the barrier layer between a portion of the first surface immediately below the convex part and a portion of the first surface provided at the center.Type: GrantFiled: May 13, 2021Date of Patent: December 5, 2023Assignee: Mitsubishi Electric CorporationInventor: Yusuke Kaji
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Publication number: 20230140664Abstract: The object is to provide a technology for enabling enhancement of the reliability of a semiconductor device. The semiconductor device includes: a semiconductor element; a piece of linear wire connected to an upper surface of the semiconductor element; a coating material in contact with the semiconductor element, and the piece of wire in an upper region on the semiconductor element; and a sealant protecting the semiconductor element, the piece of wire, and the coating material, wherein the coating material contains substances with covalent bonds between oxygen and each of silicon and a metal, a silicon oxide, and siloxane.Type: ApplicationFiled: July 22, 2022Publication date: May 4, 2023Applicant: Mitsubishi Electric CorporationInventors: Yusuke KAJI, Hiroyuki HARADA
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Patent number: 11482462Abstract: An object of the present invention is to suppress a crack in a sealing resin and a warpage in a semiconductor device in a power semiconductor device. A power semiconductor device includes: a semiconductor element; a terminal; a chassis; and a sealing resin sealing the semiconductor element and the terminal in the chassis. The sealing resin includes: a first sealing resin covering at least the semiconductor element; and a second sealing resin formed on an upper portion of the first sealing resin, and in an operation temperature of the semiconductor element, the first sealing resin has a smaller linear expansion coefficient than the second sealing resin, and a difference of a linear expansion coefficient between the first sealing resin and the terminal is smaller than a difference of a linear expansion coefficient between the second sealing resin and the terminal.Type: GrantFiled: August 25, 2017Date of Patent: October 25, 2022Assignee: Mitsubishi Electric CorporationInventors: Taishi Sasaki, Yuki Yoshioka, Hiroyuki Harada, Yusuke Kaji
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Patent number: 11476170Abstract: A power semiconductor module includes an insulating substrate, a first conductive circuit pattern, a second conductive circuit pattern, a first semiconductor device, a second semiconductor device, a sealing member, and a first barrier layer. The sealing member seals the first semiconductor device, the second semiconductor device, the first conductive circuit pattern, and the second conductive circuit pattern. At least one of the first barrier layer and the sealing member includes a first stress relaxation portion. This configuration improves the reliability of the power semiconductor module.Type: GrantFiled: December 6, 2018Date of Patent: October 18, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yusuke Kaji, Hisayuki Taki, Seiki Hiramatsu
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Publication number: 20220223546Abstract: The present invention provides a semiconductor device and a power converter having improved moisture resistance reliability. The semiconductor device of the present invention includes: a metal base substrate which includes a first insulating layer provided on a metal base, a support conductor provided on the first insulating layer, and a second insulating layer provided on a side surface of the support conductor; a semiconductor element bonded to the support conductor; a case provided outside the second insulating layer; an external terminal attached to the case; and a sealing member filled in a region surrounded by the support conductor, the second insulating layer and the case.Type: ApplicationFiled: June 19, 2019Publication date: July 14, 2022Applicant: Mitsubishi Electric CorporationInventors: Yusuke KAJI, Aya FUJITA
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Publication number: 20220165630Abstract: According to an aspect of the first disclosure, a semiconductor device includes a base plate, a case that surrounds a region immediately above the base plate, a semiconductor chip provided in the region, a sealing resin that fills the region and a barrier layer provided on the sealing resin, wherein the barrier layer has a first surface facing the base plate, a second surface opposite to the first surface, and a convex part protruding upward from the second surface, the first surface has a longer distance to the base plate as getting farther from the center, the convex part is provided avoiding the center, and a height of the convex part is greater than a distance in a thickness direction of the barrier layer between a portion of the first surface immediately below the convex part and a portion of the first surface provided at the center.Type: ApplicationFiled: May 13, 2021Publication date: May 26, 2022Applicant: Mitsubishi Electric CorporationInventor: Yusuke KAJI
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Publication number: 20210391299Abstract: The semiconductor device includes: an insulating substrate having metal layers provided at a front surface and a back surface; a semiconductor element having a lower surface joined onto the metal layer on a front surface side, and having an electrode on an upper surface; a base plate; a case member; a terminal member; a wiring member that connects the terminal member and the semiconductor element; a metal thin film member that continuously covers a surface of the terminal member and a surface of the electrode connected by the wiring member, and a surface of the wiring member; and a filling member that covers a surface of the metal thin film member and the insulating substrate exposed from the metal thin film member, and is filled in a region surrounded by the base plate and the case member.Type: ApplicationFiled: December 27, 2018Publication date: December 16, 2021Applicant: Mitsubishi Electric CorporationInventors: Yusuke KAJI, Seiki HIRAMATSU
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Patent number: 11112741Abstract: An image forming apparatus includes an image forming device, a corrector, and a controller. The image forming device is configured to form an image on a sheet using a rotating body under a predetermined image forming condition. The corrector is configured to correct the image forming condition to adjust image density unevenness corresponding to a rotation cycle of the rotating body. The controller is configured to control the image forming device to form on at least one sheet (i) plural test images that are different in correction amount for the image forming condition and (ii) pointing portions indicating intervals corresponding to the rotation cycle of the rotating body, in a state where the rotating body is continuously rotated.Type: GrantFiled: April 10, 2020Date of Patent: September 7, 2021Assignee: FUJIFILM Business Innovation Corp.Inventors: Yuma Motegi, Daisuke Ishihara, Yusuke Kaji
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Patent number: 11107756Abstract: A semiconductor device includes an insulating substrate, a semiconductor element, a conductor substrate, and a case member. The semiconductor element is connected above the insulating substrate, and the conductor substrate is connected above the semiconductor element. The case member surrounds a region overlapping with the insulating substrate, the semiconductor element, and the conductor substrate in plan view to avoid the region. A plurality of metal patterns are arranged on a main surface of an insulating layer. A groove is formed between a pair of adjacent metal patterns of the plurality of metal patterns. A through hole is formed in the conductor substrate at a position overlapping with the groove in plan view.Type: GrantFiled: December 6, 2017Date of Patent: August 31, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yusuke Kaji, Hodaka Rokubuichi, Satoshi Kondo
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Publication number: 20210195066Abstract: An image forming apparatus includes an image forming device configured to form an image on a sheet using a rotating body under a predetermined image forming condition, a corrector configured to determine a correction amount for the image forming condition to adjust image density unevenness corresponding to a rotation cycle of the rotating body, and a controller configured to control the image forming device to form, on a single sheet, plural test images that are different in the correction amount.Type: ApplicationFiled: April 6, 2020Publication date: June 24, 2021Applicant: FUJI XEROX CO., LTD.Inventors: Yusuke KAJI, Yuma MOTEGI, Daisuke ISHIHARA
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Publication number: 20210191304Abstract: An image forming apparatus includes an image forming device, a corrector, and a controller. The image forming device is configured to form an image on a sheet using a rotating body under a predetermined image forming condition. The corrector is configured to correct the image forming condition to adjust image density unevenness corresponding to a rotation cycle of the rotating body. The controller is configured to control the image forming device to form on at least one sheet (i) plural test images that are different in correction amount for the image forming condition and (ii) pointing portions indicating intervals corresponding to the rotation cycle of the rotating body, in a state where the rotating body is continuously rotated.Type: ApplicationFiled: April 10, 2020Publication date: June 24, 2021Applicant: Fuji Xerox Co., Ltd.Inventors: Yuma Motegi, Daisuke Ishihara, Yusuke Kaji
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Patent number: 11037844Abstract: A power semiconductor device includes a casing, a first insulating circuit board, a second insulating circuit board, and a sealing material. The first insulating circuit board is disposed to be surrounded by the casing. The second insulating circuit board is surrounded by the casing and spaced from the first insulating circuit board so as to sandwich a semiconductor element between the first insulating circuit board and the second insulating circuit board. The sealing material fills a region surrounded by the casing. The first or second insulating circuit board is provided with a hole extending from one main surface to the other main surface opposite to one main surface. From at least a portion of an inner wall surface of the casing a protrusion extending to a region overlapping the first or second insulating circuit board in a plan view extends toward the region surrounded by the casing.Type: GrantFiled: December 29, 2017Date of Patent: June 15, 2021Assignee: Mitsubishi Electric CorporationInventors: Satoshi Kondo, Yusuke Kaji
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Patent number: 11031355Abstract: A semiconductor device includes an insulating substrate having a main surface, a semiconductor element, a case member, and a sealing resin as a sealing material. The case member includes a recess that is continuous with a connection portion of the case member connected to the insulating substrate, and that faces the internal region. The recess includes a facing surface as an inner wall portion facing the main surface of the insulating substrate. A distance from the main surface of the insulating substrate to the facing surface as the inner wall portion is greater than a distance from the main surface to an upper surface of the semiconductor element.Type: GrantFiled: March 8, 2018Date of Patent: June 8, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yusuke Kaji, Kozo Harada
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Patent number: 11016428Abstract: An image forming apparatus includes an image forming device and a setting unit. The image forming device is configured to form an image on a recording medium using a rotating body under a predetermined image forming condition. The setting unit is configured to set a correction amount for the image forming condition adjust image density unevenness corresponding to a rotation cycle of the rotating body, based on a density of the image formed by the image forming device, and cause the image forming device to form a test image to which the correction amount is applied on the recording medium.Type: GrantFiled: April 14, 2020Date of Patent: May 25, 2021Assignee: FUJI XEROX CO., LTD.Inventors: Daisuke Ishihara, Yuma Motegi, Yusuke Kaji
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Publication number: 20210082778Abstract: A power semiconductor module includes an insulating substrate, a first conductive circuit pattern, a second conductive circuit pattern, a first semiconductor device, a second semiconductor device, a sealing member, and a first barrier layer. The sealing member seals the first semiconductor device, the second semiconductor device, the first conductive circuit pattern, and the second conductive circuit pattern. At least one of the first barrier layer and the sealing member includes a first stress relaxation portion. This configuration improves the reliability of the power semiconductor module.Type: ApplicationFiled: December 6, 2018Publication date: March 18, 2021Applicant: Mitsubishi Electric CorporationInventors: Yusuke KAJI, Hisayuki TAKI, Seiki HIRAMATSU
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Publication number: 20200286840Abstract: A semiconductor device includes an insulating substrate having a main surface, a semiconductor element, a case member, and a sealing resin as a sealing material. The case member includes a recess that is continuous with a connection portion of the case member connected to the insulating substrate, and that faces the internal region. The recess includes a facing surface as an inner wall portion facing the main surface of the insulating substrate. A distance from the main surface of the insulating substrate to the facing surface as the inner wall portion is greater than a distance from the main surface to an upper surface of the semiconductor element.Type: ApplicationFiled: March 8, 2018Publication date: September 10, 2020Applicant: Mitsubishi Electric CorporationInventors: Yusuke KAJI, Kozo HARADA
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Publication number: 20200194324Abstract: An object of the present invention is to suppress a crack in a sealing resin and a warpage in a semiconductor device in a power semiconductor device. A power semiconductor device includes: a semiconductor element; a terminal; a chassis; and a sealing resin sealing the semiconductor element and the terminal in the chassis. The sealing resin includes: a first sealing resin covering at least the semiconductor element; and a second sealing resin formed on an upper portion of the first sealing resin, and in an operation temperature of the semiconductor element, the first sealing resin has a smaller linear expansion coefficient than the second sealing resin, and a difference of a linear expansion coefficient between the first sealing resin and the terminal is smaller than a difference of a linear expansion coefficient between the second sealing resin and the terminal.Type: ApplicationFiled: August 25, 2017Publication date: June 18, 2020Applicant: Mitsubishi Electric CorporationInventors: Taishi SASAKI, Yuki YOSHIOKA, Hiroyuki HARADA, Yusuke KAJI
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Patent number: 10573570Abstract: The object of the present invention is to provide a semiconductor device capable of reducing the influence of gas generated from a resin to which a fire retardant is not added, and a power conversion device including the semiconductor device. The semiconductor device according to the present invention includes: a semiconductor element disposed on an insulating substrate; a case disposed around an outer edge of the insulating substrate, the case including an opening facing the semiconductor element; a sealing resin sealing the semiconductor element in the case; and a lid closing the opening of the case, wherein the sealing resin does not contain a fire retardant, the lid contains the fire retardant, and a space is provided between the sealing resin and the lid.Type: GrantFiled: September 14, 2018Date of Patent: February 25, 2020Assignee: Mitsubishi Electric CorporationInventors: Daisuke Murata, Hiroshi Yoshida, Satoshi Kondo, Shinsuke Asada, Yusuke Kaji
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Publication number: 20200020622Abstract: A semiconductor device includes an insulating substrate, a semiconductor element, a conductor substrate, and a case member. The semiconductor element is connected above the insulating substrate, and the conductor substrate is connected above the semiconductor element. The case member surrounds a region overlapping with the insulating substrate, the semiconductor element, and the conductor substrate in plan view to avoid the region. A plurality of metal patterns are arranged on a main surface of an insulating layer. A groove is formed between a pair of adjacent metal patterns of the plurality of metal patterns. A through hole is formed in the conductor substrate at a position overlapping with the groove in plan view.Type: ApplicationFiled: December 6, 2017Publication date: January 16, 2020Applicant: Mitsubishi Electric CorporationInventors: Yusuke KAJI, Hodaka ROKUBUICHI, Satoshi KONDO