Abstract: A nitride semiconductor device is a nitride semiconductor device including an active element and a passive element, and includes: a nitride semiconductor layer divided into an active region and an inactive region in a plan view; and a metal layer in contact with the nitride semiconductor layer in the inactive region. The active element is provided in the active region, and the passive element is provided in the inactive region. The metal layer includes a coherent state or a metamorphic state relative to the nitride semiconductor layer.

Abstract: A position detecting switch detects the position of a movable body that is capable of moving in a predetermined direction, based on a magnet attached to the movable body. The position detecting switch is equipped with a magnetic sensor that detects the magnetism of the magnet, and outputs a detected value in accordance with the magnetism, a determination unit that determines whether or not the detected value lies within a predetermined range, and a setting unit that sets the predetermined range centrally around the detected value at a specified position which is a position of the movable body specified by an operator.

Abstract: A semiconductor device includes: a substrate; a channel layer; a nitride semiconductor layer that includes a barrier layer; a source electrode; a drain electrode; a gate electrode; a drain-side insulating layer; and a source-side insulating layer. The gate electrode includes a junction portion, a drain-side protruding portion, and a source-side protruding portion. The protrusion length of the source-side protruding portion is longer than the protrusion length of the drain-side protruding portion. The bottom surface of the source-side protruding portion includes a step. The height of an end portion of the bottom surface of the source-side protruding portion is greater than the height of an end portion of the bottom surface of the drain-side protruding portion.

Abstract: A semiconductor device includes: a substrate; a channel layer; a nitride semiconductor layer that includes a barrier layer; a source electrode; a drain electrode; a gate electrode; and an insulating layer. The gate electrode includes a junction portion and a drain-side protruding portion. The insulating layer includes an in-situ Si3N4 film and an ex-situ Si3N4 film. At least one of the following is satisfied: (a) the halogen concentration of the in-situ Si3N4 film is lower than the halogen concentration of the ex-situ Si3N4 film; or (b) the interface oxygen concentration between the in-situ Si3N4 film and the nitride semiconductor layer is lower than the interface oxygen concentration between the ex-situ Si3N4 film and the in-situ Si3N4 film.

Abstract: A semiconductor device includes: an electron transport layer; an electron supply layer provided above the electron transport layer; a gate electrode provided above the electron supply layer; a contact layer embedded in penetrating recessed portions that penetrate through the electron supply layer, at positions between which the gate electrode is provided; an electron-supply assisting layer that is an example of an n-type semiconductor layer provided in contact with the electron supply layer and the contact layer and not in contact with the gate electrode, the n-type semiconductor layer being made of an n-type semiconductor containing Si; an alloy layer provided above the electron-supply assisting layer and containing Si; a first insulating layer provided in contact with the gate electrode and not in contact with the contact layer; and at least one of a source electrode or a drain electrode provided above the alloy layer and the contact layer.

Abstract: A semiconductor device includes: an electron transport layer; an electron supply layer provided above the electron transport layer and having a band gap greater than a band gap of the electron transport layer; a gate electrode provided above the electron supply layer; a contact layer embedded in recessed portions that penetrate through the electron supply layer, at positions between which the gate electrode is provided; a first insulating layer provided above a portion of the electron supply layer in which the gate electrode is not provided; and a second insulating layer provided above the first insulating layer, in contact with the contact layer, and not in contact with the gate electrode. A coefficient of linear thermal expansion of the second insulating layer is greater than a coefficient of linear thermal expansion of the electron supply layer.

Abstract: A semiconductor device includes a substrate, a back-barrier layer, a channel layer that has a band gap smaller than a band gap of the back-barrier layer, a first barrier layer that has a band gap larger than the band gap of the channel layer, a second barrier layer that is provided to fill a first recessed portion and has a band gap larger than the band gap of the channel layer, a source electrode, a drain electrode, and a gate electrode. An In composition ratio of the first barrier layer is greater than or equal to 0 and less than an In composition ratio of the second barrier layer. An Al composition ratio of the first barrier layer is greater than or equal to an Al composition ratio of the second barrier layer.

Abstract: A semiconductor device includes: a Si substrate; a back electrode provided below the Si substrate; a SiC layer provided above the Si substrate; a nitride semiconductor layer provided above the SiC layer; a source electrode and a drain electrode provided above the nitride semiconductor layer; a gate electrode in contact with the nitride semiconductor layer; an intermediate layer provided in an opening that creates an opening in the SiC layer and the nitride semiconductor layer; a metal layer provided above the opening so as to cover the intermediate layer; and a conductor that is provided inside a through via that penetrates the intermediate layer and the Si substrate and is electrically connected with the back electrode and the metal layer. The intermediate layer is a metal nitride layer or a silicon oxide layer.

Abstract: A semiconductor device includes: a Si substrate; a back electrode provided below the Si substrate; a SiC layer provided above the Si substrate; a nitride semiconductor layer provided above the SiC layer; a source electrode and a drain electrode provided above the nitride semiconductor layer; a gate electrode in contact with the nitride semiconductor layer; an intermediate layer provided in an opening that creates an opening in the SiC layer and the nitride semiconductor layer; a metal layer provided above the opening so as to cover the intermediate layer; and a conductor that is provided inside a through via that penetrates the intermediate layer and the Si substrate and is electrically connected with the back electrode and the metal layer. The intermediate layer is a metal nitride layer or a silicon oxide layer.

Abstract: A power amplifier semiconductor device includes: a substrate; a semiconductor layer provided on the surface of the substrate and including a plurality of unit HEMTs; a connection layer provided on the semiconductor layer and including a source electrode, a drain electrode, and a gate electrode of each of the plurality of unit HEMTs; a terminal layer provided on the connection layer; a back electrode which is provided on the bottom surface of the substrate and whose potential is set to a source potential; and substrate vias that pass through the substrate and have a shield wiring layer on inner walls of the substrate vias. In plan view, either one of the drain aggregation portion or the gate aggregation portion is or both of the drain aggregation portion and the gate aggregation portion are each surrounded by the substrate vias.

Abstract: A semiconductor device includes a substrate, a back-barrier layer, a channel layer that has a band gap smaller than a band gap of the back-barrier layer, a first barrier layer that has a band gap larger than the band gap of the channel layer, a second barrier layer that is provided to fill a first recessed portion and has a band gap larger than the band gap of the channel layer, a source electrode, a drain electrode, and a gate electrode. An In composition ratio of the first barrier layer is greater than or equal to 0 and less than an In composition ratio of the second barrier layer. An Al composition ratio of the first barrier layer is greater than or equal to an Al composition ratio of the second barrier layer.

Abstract: A semiconductor device includes: a gate electrode including a junction portion forming a Schottky junction with a barrier layer; a projecting portion including first and second gate field plates and projecting from the junction portion; and an insulating layer including first and second sidewalls. An angle formed between a highest position of a bottom surface of the first gate field plate and a main surface of a substrate, viewed from the first position, is a second elevation angle. An angle formed between an end on the drain electrode side of a lowest portion of a bottom surface of the second gate field plate and the main surface, viewed from the first position, is a third elevation angle. The second elevation angle is larger than the third elevation angle. The bottom surface of the second gate field plate includes an inclined surface where a distance from the barrier layer monotonically increases.

Abstract: A semiconductor device includes: a gate electrode including a junction portion forming a Schottky junction with a barrier layer; a projecting portion including first and second gate field plates and projecting from the junction portion; and an insulating layer including first and second sidewalls. An angle formed between a highest position of a bottom surface of the first gate field plate and a main surface of a substrate, viewed from the first position, is a second elevation angle. An angle formed between an end on the drain electrode side of a lowest portion of a bottom surface of the second gate field plate and the main surface, viewed from the first position, is a third elevation angle. The second elevation angle is larger than the third elevation angle. The bottom surface of the second gate field plate includes an inclined surface where a distance from the barrier layer monotonically increases.

Abstract: A power amplifier semiconductor device includes: a substrate; a semiconductor layer provided on the surface of the substrate and including a plurality of unit HEMTs; a connection layer provided on the semiconductor layer and including a source electrode, a drain electrode, and a gate electrode of each of the plurality of unit HEMTs; a terminal layer provided on the connection layer; a back electrode which is provided on the bottom surface of the substrate and whose potential is set to a source potential; and substrate vias that pass through the substrate and have a shield wiring layer on inner walls of the substrate vias. In plan view, either one of the drain aggregation portion or the gate aggregation portion is or both of the drain aggregation portion and the gate aggregation portion are each surrounded by the substrate vias.

Abstract: A semiconductor device for power amplification includes a substrate, a lower electrode, a semiconductor layer, a source electrode, a drain electrode, a gate electrode, and a field plate. The semiconductor layer is divided into an active region and an isolation region. In a plan view, a channel region includes unit channel regions that are separated by the isolation region and arranged in a Y-axis direction. The source electrode includes unit source electrodes each of which faces a corresponding one of the unit channel regions. The field plate includes unit plates each of which faces a corresponding one of the unit channel regions. At least one of plate drive lines is provided, for each of the unit plates, within the isolation region, the plate drive lines extending in an X-axis direction and electrically connecting the unit source electrodes and the unit plates.

Abstract: A semiconductor device for power amplification includes: a source electrode, a drain electrode, and a gate electrode disposed above a semiconductor stack structure including a first nitride semiconductor layer and a second nitride semiconductor layer; and a source field plate that is disposed above the semiconductor stack structure between the gate electrode and the drain electrode, and has a same potential as a potential of the source electrode. The source field plate has a staircase shape, and even when length LF2 of an upper section is increased for electric field relaxation, an increase in parasitic capacitance Cds generated between the source field plate and a 2DEG surface is inhibited.

Abstract: A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer; a source electrode and a drain electrode; and a gate electrode that is spaced apart from the source electrode and the drain electrode, and is in contact with the second nitride semiconductor layer. The gate electrode includes: a first barrier layer that includes TaN, has a layer thickness of Z1, and forms a Schottky junction with the second nitride semiconductor layer; a second barrier layer that is disposed above and in contact with the first barrier layer, includes TiN or WN, and has a layer thickness of Z2; and a wiring layer disposed above and in contact with the second barrier layer. In the semiconductor device, 200 nm?Z1+Z2?50 nm, Z1<Z2, and 50 nm>Z1>3 nm are satisfied.

Abstract: A semiconductor device includes: a substrate; a buffer layer; an intermediate layer; an electron transport layer; an electron supply layer; a source electrode and a drain electrode; and a gate electrode. The intermediate layer includes a stack resulting from stacking a first intermediate layer and a second intermediate layer. The second intermediate layer is provided above the first intermediate layer. A first position that is 100 nm above a lower surface of the intermediate layer is in the first intermediate layer. A second position that is 100 nm below an upper surface of the intermediate layer is in the second intermediate layer. A value obtained by dividing a density of edge screw mixed dislocations with a Burgers vector of <11-23>/3 at the second position by a density of edge screw mixed dislocations with the Burgers vector of <11-23>/3 at the first position is at most 0.66.

Abstract: A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer; a source electrode and a drain electrode; and a gate electrode that is spaced apart from the source electrode and the drain electrode, and is in contact with the second nitride semiconductor layer. The gate electrode includes: a first barrier layer that includes TaN, has a layer thickness of Z1, and forms a Schottky junction with the second nitride semiconductor layer; a second barrier layer that is disposed above and in contact with the first barrier layer, includes TiN or WN, and has a layer thickness of Z2; and a wiring layer disposed above and in contact with the second barrier layer. In the semiconductor device, 200 nm?Z1+Z2?50 nm, Z1<Z2, and 50 nm>Z1>3 nm are satisfied.

Abstract: A position detecting switch detects the position of a movable body that is capable of moving in a predetermined direction, based on a magnet attached to the movable body. The position detecting switch is equipped with a magnetic sensor that detects the magnetism of the magnet, and outputs a detected value in accordance with the magnetism, a determination unit that determines whether or not the detected value lies within a predetermined range, and a setting unit that sets the predetermined range centrally around the detected value at a specified position which is a position of the movable body specified by an operator.