Abstract: A support apparatus includes: a protective frame connected body to hold a plurality of protection targets flexibly, each protection target being a flexible cable or pipe having one end connected to a fixed-side member and the other end connected to a movable-side member that moves relative to the fixed-side member, the protective frame connected body having a bending portion bent in a middle, an upper side and a lower side of the protective frame connected body overlapped vertically; a lower supporter to support the lower side of the protective frame connected body; and a plurality of upper supporters, each of the plurality of upper supporters supporting the upper side of the protective frame connected body at a predetermined position of the protective frame connected body and being moved by movement of the movable-side member to pass the bending portion without being in contact with the bending portion.

Abstract: A support apparatus includes: a protective frame connected body to hold a plurality of protection targets flexibly, each protection target being a flexible cable or pipe having one end connected to a fixed-side member and the other end connected to a movable-side member that moves relative to the fixed-side member, the protective frame connected body having a bending portion bent in a middle, an upper side and a lower side of the protective frame connected body overlapped vertically; a lower supporter to support the lower side of the protective frame connected body; and a plurality of upper supporters, each of the plurality of upper supporters supporting the upper side of the protective frame connected body at a predetermined position of the protective frame connected body and being moved by movement of the movable-side member to pass the bending portion without being in contact with the bending portion.

Abstract: According to one embodiment, a semiconductor memory device includes: a plurality of first insulating layers; a plurality of first interconnect layers stacked alternately with the first insulating layers; a plurality of second interconnect layers arranged adjacently to the first interconnect layers; and a separation region including a plurality of first portions provided between the first interconnect layers and the second interconnect layers, and a plurality of second portions protruding from an outer periphery of each of the first portions. The second portions are linked to each other. The first interconnect layers and the second interconnect layers are separated from each other by the first portions and the linked second portions.

Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, a structure body, and a gate electrode. The first semiconductor region is provided on the first electrode. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided selectively on the second semiconductor region. The structure body includes an insulating part and a conductive part. The insulating part is arranged with the third and second semiconductor regions, and a portion of the first semiconductor region. The conductive part is provided in the insulating part. The conductive part includes a portion facing the first semiconductor region. The gate electrode faces the second semiconductor region. The second electrode is provided on the second and third semiconductor regions, and the structure body. The second electrode is electrically connected to the second and third semiconductor regions, and the conductive part.

Abstract: A liquid-mixing apparatus used in a liquid-mixing method comprises a plurality of supply valves provided to a cylinder. The supply valves make it possible to individually supply a plurality of types of liquids into a retention chamber. Each of the supply valves is configured so as to be switchable between an open state, in which the interior of a supply channel via which a liquid is supplied and the interior of the retention chamber intercommunicate, and a closed state, in which communication between the supply channel and the retention chamber is blocked. A piston moves in the direction in which the volume of the retention chamber increases while at least one of the supply valves is in the open state, whereby a liquid is drawn into the storage chamber.

Abstract: This semiconductor device includes: a semiconductor layer having a first face and a second face, the semiconductor layer including a first trench and a second trench in a first face side; a first gate electrode in the first trench; a first conductive layer in the first trench and between the first gate electrode and the second face, the first conductive layer being electrically separated from the first gate electrode; a second gate electrode in the second trench; a second conductive layer in the second trench and between the second gate electrode and the second face; a first electrode on a the first face side; a second electrode on a side of the second face; a first gate electrode pad being electrically connected to the first gate electrode; and a second gate electrode pad being electrically connected to the second gate electrode.

Abstract: Applicability to a composite material with high purity and high strength, and a material requiring high conductivity or high thermal conductivity is enhanced. The present invention relates to a multi-walled carbon nanotube having two or more tubes of a graphene sheet where carbon atoms are arranged in a hexagonal honeycomb form, coaxially, wherein a diameter of an outermost wall based on observation of an image by a transmission electron microscope is 3 nm or more and 15 nm or less, and a length based on observation of an image of a scanning electron microscope is 1.0 mm or more, an aggregate of multi-walled carbon nanotubes and a method for preparing the multi-walled carbon nanotube.

Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, a structure body, and a gate electrode. The first semiconductor region is provided on the first electrode. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided selectively on the second semiconductor region. The structure body includes an insulating part and a conductive part. The insulating part is arranged with the third and second semiconductor regions, and a portion of the first semiconductor region. The conductive part is provided in the insulating part. The conductive part includes a portion facing the first semiconductor region. The gate electrode faces the second semiconductor region. The second electrode is provided on the second and third semiconductor regions, and the structure body. The second electrode is electrically connected to the second and third semiconductor regions, and the conductive part.

Abstract: Applicability to a composite material with high purity and high strength, and a material requiring high conductivity or high thermal conductivity is enhanced. The present invention relates to a multi-walled carbon nanotube having two or more tubes of a graphene sheet where carbon atoms are arranged in a hexagonal honeycomb form, coaxially, wherein a diameter of an outermost wall based on observation of an image by a transmission electron microscope is 3 nm or more and 15 nm or less, and a length based on observation of an image of a scanning electron microscope is 1.0 mm or more, an aggregate of multi-walled carbon nanotubes and a method for preparing the multi-walled carbon nanotube.

Abstract: A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.

Abstract: A painting system used in a painting method in which a plurality of colors of paint supplied from a paint supply device are mixed and toned with a mixing device and applied to a workpiece, the painting system comprising a storage unit that can store the paint that is mixed and toned with the mixing device, and a cleaning unit that can clean the mixing device. When applying the paint in the storage unit to the workpiece, the cleaning unit cleans the mixing device.

Abstract: A liquid-mixing apparatus used in a liquid-mixing method comprises a plurality of supply valves provided to a cylinder. The supply valves make it possible to individually supply a plurality of types of liquids into a retention chamber. Each of the supply valves is configured so as to be switchable between an open state, in which the interior of a supply channel via which a liquid is supplied and the interior of the retention chamber intercommunicate, and a closed state, in which communication between the supply channel and the retention chamber is blocked. A piston moves in the direction in which the volume of the retention chamber increases while at least one of the supply valves is in the open state, whereby a liquid is drawn into the storage chamber.

Abstract: A semiconductor device includes a first semiconductor region, a second semiconductor region between a first gate electrode and a second gate electrode that is disposed apart from the first gate electrode in a first direction, third and fourth semiconductor regions provided on respective portions of the second semiconductor region, an insulating region provided between the third semiconductor region and the fourth semiconductor region, and an electrode provided on the third semiconductor region and the fourth semiconductor region and electrically connected to the third semiconductor region and the fourth semiconductor region. The fourth semiconductor region is parallel to the third semiconductor region in a direction intersecting the first direction. The fourth semiconductor region has an impurity concentration higher than that of the second semiconductor region.

Abstract: A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.

Abstract: A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.

Abstract: To transfer slurry without a binder smoothly in each transition between a dewatering process, a water squeezing process, and a drying process during formation of the slurry into a sheet-like shape through these processes. A dewatering process unit P1 conveys slurry while removing moisture in the slurry. A water squeezing process unit P2 conveys the resultant slurry while squeezing water from the slurry by rolling the slurry. A drying process unit P3 conveys the resultant slurry while drying the slurry by heating the slurry. The conveyance speed of the slurry in the water squeezing process is lower than the conveyance speed of the slurry in the dewatering process. The conveyance speed of the slurry in the drying process is lower than the conveyance speed of the slurry in the water squeezing process.

Abstract: Provided is a carbon fiber membrane which is inexpensive and can sufficiently increase the electric capacity per mass. The carbon fiber membrane includes only carbon nanotubes and carbon material other than carbon nanotubes, and the carbon nanotubes each having a fiber length of 30 to 500 ?m are contained in an amount of 3% by mass or more to less than 100% by mass with respect to the total amount.

Abstract: A semiconductor device includes a first semiconductor region, a second semiconductor region between a first gate electrode and a second gate electrode that is disposed apart from the first gate electrode in a first direction, third and fourth semiconductor regions provided on respective portions of the second semiconductor region, an insulating region provided between the third semiconductor region and the fourth semiconductor region, and an electrode provided on the third semiconductor region and the fourth semiconductor region and electrically connected to the third semiconductor region and the fourth semiconductor region. The fourth semiconductor region is parallel to the third semiconductor region in a direction intersecting the first direction. The fourth semiconductor region has an impurity concentration higher than that of the second semiconductor region.

Abstract: A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.

Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a first electrode, a second electrode, a third electrode, a first insulation region, a second insulation region, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the second conductivity type, and a fourth electrode. The second electrode includes first portions and a second portion. The second portion extends in a first direction. The first portions extend in a direction away from the second portion. The second portion is between the first portions and the first electrode in a second direction. The fourth semiconductor region is positioned between adjacent first electrode portions in the first direction.