Patents by Inventor Yusuke KOWASE

Yusuke KOWASE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11694845
    Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes a functional unit including internal electrodes laminated in a first direction, and a pair of covers that covers the functional unit from both sides in the first direction, the multi-layer unit satisfying a relationship of (2*t2)/t1?0.6, where t1 represents a dimension of the functional unit in the first direction and t2 represents a dimension of each of the pair of covers in the first direction. The side margin covers the multi-layer unit in a second direction orthogonal to the first direction.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: July 4, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yusuke Kowase
  • Patent number: 11688558
    Abstract: A ceramic electronic component includes a multilayer chip having a rectangular parallelepiped shape and including dielectric layers and internal electrode layers alternately stacked, the dielectric layers being mainly composed of ceramic, the internal electrode layers being alternately exposed to two edge faces of the multilayer chip opposite to each other, and external electrodes respectively formed on the two edge faces, wherein an average crystal grain size of the ceramic in a cross section is 200 nm or less in a dielectric portion, and a CV value of a grain size distribution of crystal grains of the ceramic in the cross section is less than 38% in the dielectric portion, the dielectric portion being defined as a region made of the ceramic in the multilayer chip that is in contact with one of the external electrodes and that has a width of 5 ?m from said one of the external electrodes.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: June 27, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yusuke Kowase
  • Patent number: 11664166
    Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes a functional unit including internal electrodes laminated in a first direction, and a pair of covers that covers the functional unit from both sides in the first direction, the multi-layer unit satisfying a relationship of (2*t2)/t1?0.6, where t1 represents a dimension of the functional unit in the first direction and t2 represents a dimension of each of the pair of covers in the first direction. The side margin covers the multi-layer unit in a second direction orthogonal to the first direction.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: May 30, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yusuke Kowase
  • Patent number: 11557432
    Abstract: A ceramic electronic device includes: a multilayer chip having a structure in which each of dielectric layers and each of internal electrode layers are alternately stacked; and external electrodes provided on end faces of the multilayer chip, wherein a main component of the external electrodes is a first metal, wherein the internal electrode layers include the first metal and a second metal of which a melting point is higher than that of the first metal, wherein a diffusion coefficient of the first metal with respect to the second metal is larger than that of the second metal with respect to the first metal, wherein a number of a cavity in a range of 10 numbers of the internal electrode layers that are next to each other and are connected to a same external electrode of the first external electrode and the second external electrode is 1 or less.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: January 17, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Takehiro Tanaka, Kotaro Mizuno, Yusuke Kowase
  • Patent number: 11557433
    Abstract: A multilayer ceramic capacitor includes an element body of roughly rectangular solid shape which is constituted by dielectric layers alternately stacked with internal electrode layers having different polarities, with a pair of cover layers formed on it to cover the top and bottom faces in the direction of lamination of the foregoing, and which has a pair of principal faces, a pair of end faces, and a pair of side faces, wherein external electrodes are formed on the pair of end faces and at least one of the pair of principal faces of the element body, and Tt representing the thickness of the external electrode and Tc representing the thickness of the cover layer satisfy the relationship of 1/30?Tt/Tc?4/5, and the thickness of the cover layers, or Tc, is 10 ?m or more but 30 ?m or less.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: January 17, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Shohei Kitamura, Yukihiro Konishi, Kotaro Mizuno, Yoichi Kato, Yusuke Kowase, Toru Makino, Yoshinori Tanaka
  • Publication number: 20220301772
    Abstract: A multilayer ceramic capacitor includes an element body and a pair of external electrodes. The element body includes a laminate. The laminate has a plurality of inner electrode layers stacked via dielectric layers. A height of the laminate in a stacking direction of the inner electrode layers is greater than a width of each of the inner electrode layers. The two external electrodes are formed on the element body such that one of the two external electrodes is connected to every other ones of the inner electrode layers and the other external electrode is connected to the remaining every other ones of the inner electrode layers.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 22, 2022
    Applicant: TAIYO YUDEN CO., LTD.
    Inventor: Yusuke KOWASE
  • Patent number: 11145458
    Abstract: A multi-layer ceramic electronic component includes a plurality of layered internal electrodes and a first crystal grain. The plurality of layered internal electrodes are disposed at intervals in a first direction and each include a pore. The first crystal grain has a larger diameter in the first direction than the interval and has a part disposed in the pore.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: October 12, 2021
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Yusuke Kowase
  • Publication number: 20210233711
    Abstract: A multilayer ceramic capacitor includes an element body of roughly rectangular solid shape which is constituted by dielectric layers alternately stacked with internal electrode layers having different polarities, with a pair of cover layers formed on it to cover the top and bottom faces in the direction of lamination of the foregoing, and which has a pair of principal faces, a pair of end faces, and a pair of side faces, wherein external electrodes are formed on the pair of end faces and at least one of the pair of principal faces of the element body, and Tt representing the thickness of the external electrode and Tc representing the thickness of the cover layer satisfy the relationship of 1/30?Tt/Tc?4/5, and the thickness of the cover layers, or Tc, is 10 ?m or more but 30 ?m or less.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 29, 2021
    Inventors: Shohei KITAMURA, Yukihiro KONISHI, Kotaro MIZUNO, Yoichi KATO, Yusuke KOWASE, Toru MAKINO, Yoshinori TANAKA
  • Patent number: 11069480
    Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a direction of a first axis, internal electrodes positioned between the ceramic layers, and a side surface facing in a direction of a second axis orthogonal to the first axis, the internal electrodes being exposed from the side surface, the multi-layer unit having a first dimension of 0.5 mm or less along a direction of a third axis orthogonal to the first axis and the second axis, the side surface having an area of 0.1 mm2 or more. The side margin covers the side surface of the multi-layer unit.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: July 20, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yusuke Kowase
  • Publication number: 20210159014
    Abstract: A ceramic electronic component includes a multilayer chip having a rectangular parallelepiped shape and including dielectric layers and internal electrode layers alternately stacked, the dielectric layers being mainly composed of ceramic, the internal electrode layers being alternately exposed to two edge faces of the multilayer chip opposite to each other, and external electrodes respectively formed on the two edge faces, wherein an average crystal grain size of the ceramic in a cross section is 200 nm or less in a dielectric portion, and a CV value of a grain size distribution of crystal grains of the ceramic in the cross section is less than 38% in the dielectric portion, the dielectric portion being defined as a region made of the ceramic in the multilayer chip that is in contact with one of the external electrodes and that has a width of 5 ?m from said one of the external electrodes.
    Type: Application
    Filed: November 10, 2020
    Publication date: May 27, 2021
    Applicant: TAIYO YUDEN CO., LTD.
    Inventor: Yusuke KOWASE
  • Patent number: 11004607
    Abstract: A method for manufacturing a multilayer ceramic capacitor includes: producing a plurality of dielectric green sheets; producing therefrom a plurality of internal electrode-printed green sheets; producing therefrom a plurality of individually cut unsintered laminates by stacking some of the plurality of dielectric green sheets, as cover layers, and the plurality of internal electrode-printed green sheets together; producing therefrom element body precursors by applying a ceramic paste to side faces of the unsintered laminates for forming side margins thereon, wherein an application thickness of the ceramic paste is adjusted in a manner such that a thickness of the side margins is greater than a thickness of the cover layers in the final product; producing therefrom element bodies by sintering; and forming external electrodes on at least one of principal faces and on both end faces of the element bodies.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: May 11, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Shohei Kitamura, Yukihiro Konishi, Kotaro Mizuno, Yoichi Kato, Yusuke Kowase, Toru Makino, Yoshinori Tanaka
  • Publication number: 20200335280
    Abstract: A ceramic electronic device includes: a multilayer chip having a structure in which each of dielectric layers and each of internal electrode layers are alternately stacked; and external electrodes provided on end faces of the multilayer chip, wherein a main component of the external electrodes is a first metal, wherein the internal electrode layers include the first metal and a second metal of which a melting point is higher than that of the first metal, wherein a diffusion coefficient of the first metal with respect to the second metal is larger than that of the second metal with respect to the first metal, wherein a number of a cavity in a range of 10 numbers of the internal electrode layers that are next to each other and are connected to a same external electrode of the first external electrode and the second external electrode is 1 or less.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 22, 2020
    Inventors: Takehiro TANAKA, Kotaro MIZUNO, Yusuke KOWASE
  • Publication number: 20200294720
    Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes a functional unit including internal electrodes laminated in a first direction, and a pair of covers that covers the functional unit from both sides in the first direction, the multi-layer unit satisfying a relationship of (2*t2)/t1>0.6, where t1 represents a dimension of the functional unit in the first direction and t2 represents a dimension of each of the pair of covers in the first direction. The side margin covers the multi-layer unit in a second direction orthogonal to the first direction.
    Type: Application
    Filed: March 10, 2020
    Publication date: September 17, 2020
    Inventor: Yusuke KOWASE
  • Publication number: 20200135398
    Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a direction of a first axis, internal electrodes positioned between the ceramic layers, and a side surface facing in a direction of a second axis orthogonal to the first axis, the internal electrodes being exposed from the side surface, the multi-layer unit having a first dimension of 0.5 mm or less along a direction of a third axis orthogonal to the first axis and the second axis, the side surface having an area of 0.1 mm2 or more. The side margin covers the side surface of the multi-layer unit.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 30, 2020
    Inventor: Yusuke KOWASE
  • Patent number: 10515764
    Abstract: A multilayer ceramic capacitor includes an element body of roughly rectangular solid shape which is constituted by dielectric layers alternately stacked with internal electrode layers having different polarities and which has a pair of principle faces, a pair of end faces, and a pair of side faces, wherein the multilayer ceramic capacitor is such that: external electrodes are formed on the pair of end faces and one principle face of the element body; and on a cross section taken in parallel with one end face of the multilayer ceramic capacitor near the end face, the ratio of area A constituted by the internal electrode layers connected to the external electrode on this end face side and the dielectric layers present between the internal electrode layers, and area B covering the part of the section excluding the external electrodes, A/B, is 0.92 or more.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: December 24, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kotaro Mizuno, Yukihiro Konishi, Shohei Kitamura, Yoichi Kato, Yusuke Kowase, Toru Makino, Yoshinori Tanaka
  • Patent number: 10403437
    Abstract: In an exemplary embodiment, a multilayer ceramic capacitor 10 is formed in such a way that a first face f1 of a capacitor body 11 has a concave shape and a first part 12a of a first external electrode 12 contacts the concave-shaped first face f1, and that a second face f2 of the capacitor body 11 has a concave shape and a first part 13a of a second external electrode 13 contacts the concave-shaped second face f2.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: September 3, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yusuke Kowase
  • Publication number: 20190259535
    Abstract: A multi-layer ceramic electronic component includes a plurality of layered internal electrodes and a first crystal grain. The plurality of layered internal electrodes are disposed at intervals in a first direction and each include a pore. The first crystal grain has a larger diameter in the first direction than the interval and has a part disposed in the pore.
    Type: Application
    Filed: February 19, 2019
    Publication date: August 22, 2019
    Inventor: YUSUKE KOWASE
  • Publication number: 20190080848
    Abstract: A multilayer ceramic capacitor includes an element body of roughly rectangular solid shape which is constituted by dielectric layers alternately stacked with internal electrode layers having different polarities and which has a pair of principle faces, a pair of end faces, and a pair of side faces, wherein the multilayer ceramic capacitor is such that: external electrodes are formed on the pair of end faces and one principle face of the element body; and on a cross section taken in parallel with one end face of the multilayer ceramic capacitor near the end face, the ratio of area A constituted by the internal electrode layers connected to the external electrode on this end face side and the dielectric layers present between the internal electrode layers, and area B covering the part of the section excluding the external electrodes, A/B, is 0.92 or more.
    Type: Application
    Filed: November 8, 2018
    Publication date: March 14, 2019
    Inventors: Kotaro MIZUNO, Yukihiro KONISHI, Shohei KITAMURA, Yoichi KATO, Yusuke KOWASE, Toru MAKINO, Yoshinori TANAKA
  • Publication number: 20190006106
    Abstract: In an exemplary embodiment, a multilayer ceramic capacitor 10 is formed in such a way that a first face f1 of a capacitor body 11 has a concave shape and a first part 12a of a first external electrode 12 contacts the concave-shaped first face f1, and that a second face f2 of the capacitor body 11 has a concave shape and a first part 13a of a second external electrode 13 contacts the concave-shaped second face f2.
    Type: Application
    Filed: September 10, 2018
    Publication date: January 3, 2019
    Inventor: Yusuke KOWASE
  • Patent number: 10153091
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction, internal electrodes disposed between the ceramic layers, and a side surface from which the internal electrodes are exposed, the side surface being oriented in a second direction orthogonal to the first direction. The side margin covers the side surface. The side margin includes a first area having a porosity of 10% or less, a dimension of the first area in the second direction from the side surface being ΒΌ of a dimension of the side margin in the second direction, and a second area having a porosity of 10% or more and 25% or less and having a porosity higher than the porosity of the first area, the second area covering the first area from the second direction.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: December 11, 2018
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Yusuke Kowase